DAC8775IRWFT

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1. Describe

The DAC8775IRWFT is a quad precision, fully integrated, 16-bit digital-to-analog converter (DAC) with adaptive power management designed to meet industrial control requirements. When the adaptive power management circuit is enabled, the power consumption of the chip can be minimized. When programmed as a current output, current supply voltage Output driver regulated between 4.5 V and 32 V Voltage-based continuous feedback Current output pin through the integrated buck/boost converter. When programmed as a voltage output, the circuit generates a programmable supply voltage for the voltage output stage (±15 V). The DAC8775 also contains an LDO to generate digital power (5 V) from a single supply pin. The DAC8775 is also implemented using a high-speed addressable remote transducer (HART) signal interface for superimposing an external HART signal current output. The slew rate DAC of the current output is register programmable. The device can be powered from a single external supply of +12 V using the integrated buck/boost converter to +36 V or using an external power supply when the buck/boost converter is disabled.

2. Feature

    1. Output current:

        – 0 mA to 24 mA; 3.5 mA to 23.5 mA; 0 mA to 20 mA; 4 mA to 20 mA; ±24 mA

    2. Output voltage (with/without 20% overrange):

        – 0 V to 5 V; 0 V to 10 V; ±5V; ±10 V

        – 0 V to 6 V; 0 V to 12 V; ±6V; ±12 V

    3. Adaptive power management

    4. Single-width power pins (12 V – 36 V)

    5. ±0.1% FSR Total Unadjusted Error (TUE)

    6. DNL: ±1 LSB max

    7. Internal 5V reference voltage (10 ppm/°C max)

    8. Internal 5V digital power output 

    9. CRC/frame error checking, watchdog timer

  10. Thermal alarms, open/short circuits to ensure system reliability

  11. Safety measures under alarm conditions 

  12. Automatic learning load detection

  13. Wide temperature range: –40°C to +125°C

3. Application

    1. 4mA to 20mA current loop

    2. Analog output modules

    3. Programmable Logic Controller (PLC)

    4. Building automation

    5. Sensor transmitter

    6. Process control

4. Pin configuration

5. Current output stage

Each channel's current output stage includes a preconditioner and a precision current source with programmable output ranges of 0 mA to 20 mA, 0 mA to 24 mA, 4 mA to 20 mA, 3.5 mA to 23.5 mA, or ± 24 mA ampere milliampere. In current output mode, the maximum compliance voltage on pin IOUT_x is between (-|VNEG_IN_x| + 3 V) ≤ |IOUT_x|. ≤(VPOS_IN_x – 3 V). When using a buck-boost converter, this compliance voltage is automatically maintained to generate these supplies. However, when using the external power supply VPOS_IN_x pins (buck-boost converter disabled), the VPOS_IN_x and VNEG_IN_x supplies should be selected to maintain this compatible voltage.

6. Voltage output stage

The output range is programmable for 0 V to +5 V or 0 V to +10 V (unipolar) output mode and ±5 V or ±10 V for bipolar output mode. Also, there is an option to increase the output The voltage range has been increased by 20%. Output current drives up to 10 mA. Output stage has short circuit current The protection limits the output current to 16 mA, which can be changed to 8 mA, 20 mA, or 24 mA by writing to Address 0x04, Bits 15 and 14. When using buck-boost converters to generate these supplies, the minimum headroom of the voltage output stage is automatically maintained. However, when using external power supplies for the VPOS_IN_x and VNEG_IN_x pins (buck- boost converter disabled) minimum headroom and headroom must be maintained. In this case, the recommended operating conditions show the maximum allowed difference between VPOS_IN_x and VNEG_IN_x. The voltage outputs are designed to drive capacitive loads up to 1 μF. For loads greater than 20 nF, an external compensation capacitor can be connected between CCOMP_x and VOUT_x to keep the output voltage stable at the cost of reducing bandwidth and increasing settling time. Note that the step response (due to a large capacitive load (> 20 nF) on the input code voltage output pin will trigger a short circuit limiting output stage circuit. This will cause the short alarm status bit to be set. Therefore, when the voltage output pin is loaded with a high capacitive load during sexual load.

7. Buck-Boost Converter

The DAC8775 includes a buck-boost converter for each channel to minimize the power consumption of the chip and provide a significant level of system integration. The buck-boost converter is based on a single-inductor multiple-output (SIMO) architecture that requires one inductor (per channel) to simultaneously generate all analog The power required by the chip. The buck-boost converter utilizes three on-chip switches that are controlled synchronously by current-mode control logic. These converters are designed to operate in discontinuous conduction mode (DCM) with an external 100 µH value inductor (per channel) connected between the LN_x and LP_x pins. Peak inductor current The inductor is internally limited to 0.5 A. These buck-boost converters use variable switching frequency technology. This technique increases converter efficiencyswitching frequency at light loads and increase it at heavy loads. Under no-load conditions, the converter stops switching completely until the load capacitor discharges to the preset voltage. At this point the converter automatically starts switching and charging the load capacitor. In addition to saving power at all loads, this technique ensures low switching noise at the converter output at light loads. The minimum load capacitance for these buck-boost converters is 10 µF. For each buck-boost converter (A, B, C, D). The Buck-Boost converter generates ripple on the supply pins (VPOS_IN_x and VNEG_IN_x) when enabled. This ripple is usually attenuated by the power supply rejection ratio of the output amplifier (IOUT_x or VOUT_x) and appear as noise on the output pins of the amplifiers (IOUT_x and VOUT_x). The larger load capacitance combined with the additional filter reduces output ripple, but increases the settling time of the converter output.

8. Select and enable buck-boost converter

The analog output of a buck-boost converter can be enabled in two different ways: current output mode or voltage output mode. Any and all combinations of DAC8775 buck-boost converters can be selected by writing to Address 0x06 (see Table 5). The positive/negative leg of the selected Buck-Boost converter can be Enabled by writing to address 0x07 (see Table 6). Note that VNEG_IN_x is internally shorted to PBKG when the negative leg of the Buck-Boost converter is not enabled. When used in voltage output mode, the buck-boost converter generates a constant ±15.0 V for the positive and negative supplies. Alternatively, this constant voltage can be modified by the clamp register setting each channel. When used in current output mode, the Buck-Boost converter generates positive and negative supplies according to the RANGE setting, for example, only generates negative supplies in the ±24 mA range. The minimum voltage the Buck-Boost converter can produce on the VPOS_IN_x pins is 4.96 V, and the typical efficiency is 75% at PVDD_x = 12 V and a load current of 24 mA, which significantly reduces the power dissipation on the chip. The maximum voltage that the Buck-Boost converter can produce on the VPOS_IN_x pins is 32 V. Likewise, the minimum voltage that the Buck-Boost converter can produce on the VNEG_IN_x pins is –18.0 V. The maximum voltage that the Buck-Boost converter can produce on the VNEG_IN_x pins is –5.0 V.

9. Configurable clamp function and current output settling time

A large signal step on the output pin IOUT_x with a 1 KΩ load requires a corresponding buck-boost converter to change the output voltage on the VPOS_IN_x pin from 4 V to 27 V. Therefore, the current output settling time will be determined by the settling time of the VPOS_IN_x voltage. Reduced settling time can be traded off by increasing the minimum voltage produced by the corresponding buck-boost converter on the positive output, at the cost of reduced power consumption.

10. Analog power

After power-up, a hardware reset needs to be issued using the RESET pin. The DAC8775 is designed to operate from a single supply (12 V to 36 V) using an integrated buck-boost converter. In this mode, pins PVDD_x and AVDD must be connected together and driven by the same supply. VPOS_INx and VNEG_IN_x will be enabled by device register programming. Suggest DVDD is applied first to reduce output transients. The DAC8775 can also operate without an integrated buck-boost converter. In this mode, pins PVDD_x, AVDD and VPOS_IN_x must be connected together and driven from the same supply (12 V to 36 V). exist To reduce output transients in this mode, it is recommended to apply DVDD first, then VPOS_IN_x / PVDD_x / AVDD, and finally REFIN.

11. Digital Power Supply

The digital power supply to DAC8775 can be internally generated or externally supplied. This is determined by the status of DVDD_EN pin. When the DVDD_EN pin is left floating, the voltage on DVDD pin is generated via an internal LDO. The typical value of the voltage generated on DVDD pin is 5 V. In this mode, the DVDD pin can also be used to power other digital components on the board. The maximum drive capability of this pin is 10mA. Please note that to ensure stability the minimum load capacitance on this pin is limited to 100 pF, where as the maximum load capacitance is limited to 0.1 µF. When the DVDD_EN pin is tied to 0 V, the internal LDO is disabled and the DVDD pin must be powered via an external digital supply.