Allicdata Part #: | FT800Q-T-ND |
Manufacturer Part#: |
FT800Q-T |
Price: | $ 0.00 |
Product Category: | Integrated Circuits (ICs) |
Manufacturer: | FTDI, Future Technology Devices International Ltd |
Short Description: | IC TFT LCD CONTROLLER 48VQFN |
More Detail: | N/A |
DataSheet: | FT800Q-T Datasheet/PDF |
Quantity: | 23899 |
Series: | EVE |
Packaging: | Tray |
Part Status: | Active |
Type: | Controller |
Applications: | TFT-LCD Monitors |
Mounting Type: | Surface Mount |
Package / Case: | 48-VFQFN |
Supplier Device Package: | 48-VQFN (7x7) |
Base Part Number: | FT800 |
Due to market price fluctuations,if you need to purchase or consult the price.You can contact us or emial to us: sales@allicdata.com
1. Feature
1. FT800 features include graphics controller, audio processing and resistive touch controller.
2. Embedded Video Engine (EVE) with widget support to offload the system MPU and provide various graphics capabilities
3. Built-in graphics operations allow users without specialized knowledge to create high-quality displays
4. Integration with 4-wire touchscreen controller with median filtering and touch force sensing.
- The hardware engine can recognize touch tags and track touch motion.
- It provides notifications for up to 255 touch tabs.
5. Standard serial interface for host MPU/MCU, SPI up to 30MHz or I²C clock up to 3.4MHz
6. Programmable interrupt controller provides interrupts to host MPU/MCU
7. Built-in 12MHz crystal oscillator with PLL, providing 48MHz or 36MHz system clock
8. Video RGB parallel output with 2-bit dithering (default RGB data width 6-6-6);
- configurable to support resolutions up to 512x512 and LCD R/G/B data widths from 1 to 6
9. Programmable timing to adjust HSYNC and VSYNC timing to connect multiple monitors
10. Supports LCD displays in WQVGA (480x272) and QVGA (320x240) formats, with data enable (DE) support mode and VSYNC/HSYNC mode
11. Although only 6-bit (RGB-6,6,6) pins are available, the FT800 computes 8-bit color; this improves halftone appearance
12. Display enable control output to LCD panel
13. Mono audio channel output with PWM output
14. 64-voice polyphonic synthesizer
15. Plays audio waves in mono 8-bit linear PCM, 4-bit ADPCM and µ-Law encoding formats at sampling frequencies from 8 kHz to 48 kHz.
- Built-in digital filter reduces system design complexity with external filtering
16. PWM output for LED backlight dimming control
17. Low power consumption for portable applications, 24mA active (typical) and 10-25 uA sleep (typical)
18. No framebuffer RAM required
19. Advanced object-oriented architecture supports low-cost MPU/MCU using I2C and SPI interface as system host
20. Power mode control allows the chip to enter power-down, sleep and standby states
21. Supports host interface I/O voltages from 1.8V to 3.3V
22. Internal regulator provides 1.2V to digital core
23. -40°C to 85°C extended operating temperature range
24. Available in a compact lead-free, VQFN-48, 7mm X 7mm X 0.9mm package, RoHS compliant
2. Application
1. Point-of-sale machines
2. Multifunction printer
3. Meter
4. Home security system
5. Graphical touchpad - remote control, dial pad
6. Telephone/video conferencing system
7. Telephone and switchboard
8. Medical Devices
9. Blood pressure display
10. Heart monitor
11. Blood sugar level display
12. Ventilator
13. Gas Chromatograph
14. Power meter
15. Electrical
16. STB
17. Thermostat
18. Display of sprinkler system
19. Medical Devices
20. GPS/Satellite Navigation
21. Vending machine control panel
22. Elevator control
3. Pin configuration
4. Function Description
1. Serial host interface
2. System clock
3. Graphics engine
4. Parallel RGB video interface
5. Audio engine
6. Touch Engine
7. Power management
5. Clock frequency
After power-up, the internal relaxation oscillator is not trimmed. The chip-to-chip frequency range can be wide. If the application uses an internal clock without an external clock source, clock trimming is recommended in the following ways software for better performance. When the input clock is 12MHz, the system clock defaults to 48MHz. Allows the host to switch the system through the host command "CLK48MHz" and "CLK36MHz" to control the clock between 48MHz and 36MHz, respectively. This clock switch runs synchronously with the VSYNC edge. This is to avoid switching clocks. Therefore, clock switching will only take effect when REG_PCLK is non-zero.
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