GAL16V8D-10LP Allicdata Electronics
Allicdata Part #:

GAL16V8D-10LP-ND

Manufacturer Part#:

GAL16V8D-10LP

Price: $ 0.00
Product Category:

Integrated Circuits (ICs)

Manufacturer: Lattice Semiconductor Corporation
Short Description: IC CPLD 8MC 10NS 20DIP
More Detail: N/A
DataSheet: GAL16V8D-10LP datasheetGAL16V8D-10LP Datasheet/PDF
Quantity: 39800
Stock 39800Can Ship Immediately
Specifications
Series: GAL®16V8
Packaging: Bulk 
Part Status: Obsolete
Programmable Type: EE PLD
Delay Time tpd(1) Max: 10.0ns
Voltage Supply - Internal: 4.75 V ~ 5.25 V
Number of Logic Elements/Blocks: --
Number of Macrocells: 8
Number of Gates: --
Number of I/O: --
Operating Temperature: 0°C ~ 75°C (TA)
Mounting Type: Through Hole
Package / Case: 20-DIP (0.300", 7.62mm)
Supplier Device Package: 20-PDIP
Base Part Number: GAL16V8
Description

Due to market price fluctuations,if you need to purchase or consult the price.You can contact us or emial to us:   sales@allicdata.com


1. Describe

With a maximum propagation delay time of 3.5 ns, the GAL16V8 combines a high-performance CMOS process with electrically erasable (E2) floating gate technology to provide the highest speed performance is available in the PLD market. High-speed erase times (<100ms) allows fast and efficient device reprogramming. Common architecture provides maximum design flexibility by Allows the output logic macrocell (OLMC) to be configured by user. GAL16V8 device Ability to fully emulate any of these PAL architectures Function/fuse diagram/parameter compatibility. Unique test circuit and reprogrammable unit allow complete AC, DC and functional testing during manufacturing. As a result, the lattice Semiconductor provides 100% field programmability and functionality for all GAL products. In addition, 100 erase/write cycles and Offers over 20 years of data retention.

2. Feature

    1. High-performance E2CMOS® technology

        - 3.5 ns maximum propagation delay

        - Fmax = 250 MHz

        - 3.0 ns maximum from clock input to data output

        - UltraMOS® advanced CMOS technology

    2. 50% to 75% reduction in bipolar power

        - 75mA typical Icc on low power devices

        - 45mA typical Icc on quarter power device

    3. Active pull-ups on all pins

    4. E2 Cell Technology

        - reconfigurable logic

        - reprogrammable cells

        - 100% test/100% yield

        - High-speed electrical erase (<100ms)

        - 20 years data retention

    5. Eight output logic macrocells

        - Maximum flexibility for complex logic design

        - Programmable output polarity

        - Also emulates a 20-pin PAL® device with full Function/Fuse Diagram/Parameter Compatibility

    6. Preload and power-on reset of all registers

        - 100% functional testability

    7. Applications include:

        - DMA control

        - State machine control

        - High-speed graphics processing

        - Standard logic speed upgrade

    8. Electronic signature for identification

    9. Pb-free package options

3. Pin configuration

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