HMC837LP6CE

Series:	--
Packaging:	Cut Strip
Lead Free Status / RoHS Status:	--
Part Status:	Active
Moisture Sensitivity Level (MSL):	--
PLL:	Yes
Input:	Clock
Output:	Clock
Number of Circuits:	1
Ratio - Input:Output:	1:1
Differential - Input:Output:	No/Yes
Frequency - Max:	4.6GHz
Divider/Multiplier:	Yes/Yes
Voltage - Supply:	3 V ~ 5.2 V
Operating Temperature:	-40°C ~ 85°C
Mounting Type:	Surface Mount
Package / Case:	40-VFQFN Exposed Pad
Supplier Device Package:	40-SMT (6x6)
Base Part Number:	HMC837

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HMC837LP6CE Application Field and Working Principle

The HMC837LP6CE is a highly integrated, low-power phase-locked loop (PLL) frequency synthesizer developed by Analog Devices, Inc. It is designed to provide excellent jitter and high-frequency noise performance in a wide variety of clock/timing applications. The device is offered in a small, 6 x 5.4 mm package and is capable of supporting 12 different clock frequencies from 300 MHz to 3 GHz.

Application Field

The HMC837LP6CE is ideally suited for a wide variety of applications, such as Digital Radio Frequency (DRF) transceivers, wireless infrastructure, Digital bus receivers, Optical networks, Base stations, Satellite navigation systems and Navigation systems. The device can be used in other high-performance clock/timing applications, such as GNSS stratum level frequency synthesisers and Switched Reluctance Motor drivers, as well as in next-generation frequency agile communications systems.

Working Principle

The HMC837LP6CE operates on the principle of phase-locked loop (PLL) frequency synthesis. The device uses a Programmable Divide-by-N counter, a phase-frequency detector and output divider to generate high-precision output frequencies. The PLL electronically adjusts and maintains the phase and frequency relation between the reference clock and the device’s output frequency. The programmable divide-by-N counter divides the external reference clock by an internally programmed Value and compares it to the internally generated clock. The phase-frequency detector compares the phase difference between the reference clock and the internal clock and adjusts the divider to maintain a phase-locked loop, thereby accurately synthesizing the output clock. To further ensure jitter and noise performance, the HMC837LP6CE includes on-chip, high-performance crystal oscillator and voltage-controlled oscillator (VCO) building blocks. The crystal oscillator incorporates an on-chip crystal, low-jitter phase-locked loop, and active loop filter to generate a low-jitter output clock. The resonator output is then refined further by means of the VCO\'s low-noise frequency divider and phase-locked loop feedback. The PLL also features an internal charge pump which eliminates the need for an external loop filter.Additional features of the device include integrated noise suppression filters, a wide operating temperature range (-40°C to +85°C) and a low-power standby mode. The device is programmed using the industry-standard I2C serial interface, making it easy to interface with a variety of popular microcontrollers.

Conclusion

The HMC837LP6CE is a highly integrated frequency synthesizer from Analog Devices, Inc. It uses a Programmable Divide-by-N counter, a phase-frequency detector and output divider to generate high-precision output frequencies from 300 MHz to 3 GHz. The PLL also includes on-chip, high-performance crystal oscillator and voltage-controlled oscillator (VCO) building blocks for optimum jitter and noise performance. The device is ideal for a wide range of applications, such as Digital Radio Frequency (DRF) transceivers, wireless infrastructure, Digital bus receivers and more.

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