MAX9160EUI+

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The MAX9160EUI+ is a compact, voltage-controlled oscillator (VCO) buffer/driver and clock synthesizer solution designed to reduce design complexity, space requirements, and bill of materials (BOM) in a wide variety of clock synthesis, multiple phase-locked loop (PLL) clock distribution and noise reduction applications, such as servers, storage, memory systems, optical networks, microwave communication and other telecom applications, automotive infotainment, broadcast and professional music and video production systems, and medical imaging.

The MAX9160EUI+ is a pin-compatible successor to the MAX9160EUI, and is designed with two VCOs, a programmable output clock driver, and a phase-locked loop (PLL) to generate up to eight clock outputs. It offers design flexibility with up to eight differential LVPECL, LVDS, and CML outputs, as well as a single CMOS output, from one clock or multiple PLL clock sources. The MAX9160EUI+ can be used for clock synthesis applications to produce custom clock frequencies from a single reference, as well as for PLL clock distribution applications with multiple PLLs. By combining two VCOs for a single clock source, the device can reduce jitter and save space.

The MAX9160EUI+ features a single VCO and a PLL, offering greater output-to-input frequency ratios when compared to the MAX9160EUI. The device also offers a programmable output clock driver, as well as a wide range of clock frequencies. The MAX9160EUI+ provides a variable pulse shaping capability, allowing designers to optimize the output signal based on the requirements of the respective application. The device supports both DPLL and FM synthesizer architectures, allowing designers to save power, area, and cost. The device also supports power down modes, enabling designers to save power when the device is not in use.

The MAX9160EUI+ offers advanced features to improve EMI performance without the need for additional external filters. The output jitter reduction capabilities of the device enable system noise reduction, helping to prevent false triggers in low-power sleep modes. Furthermore, the dynamic output frequency range extends the input frequency range from DC to 2.25 GHz (LVPECL/LVDS outputs) and 600 MHz (CML outputs). The wide frequency range makes the MAX9160EUI+ suitable for multi-mode applications such as automotive infotainment, broadcast, and professional music and video production systems.

The MAX9160EUI+ integrates the latest design advances to reduce system size, complexity and cost. The device incorporates a programmable output clock driver with separate OR and XOR functions, which helps to simplify the design by eliminating multiple components and connections. The output control logic (OCL) feature of the device enables the output clock driver to be triggered by external OR and XOR signals. Furthermore, the device offers reduced size and improved noise immunity due to its constant size, low pin-count package.

The MAX9160EUI+ is designed to provide low jitter and power dissipation, making it suitable for a wide range of applications. It offers > 30 dBc spurious-free dynamic range (SFDR) to reduce EMI noise. Its flexible power management features enable the device to integrate multiple clocking applications, reducing overall space requirements and cost. Additionally, the device offers a wide frequency range from DC to 6 GHz, enabling a wide range of system applications.

The MAX9160EUI+ is an ideal solution for a variety of clock synthesis, multiple PLL clock distribution, and noise reduction applications. Its advanced features and low power dissipation enable designers to reduce complexity and cost, and improve system performance. Furthermore, the device offers a wide frequency range, allowing applications in multiple clocking applications, from low-power sleep modes to automotive infotainment applications.

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