
Allicdata Part #: | MC100E175FNG-ND |
Manufacturer Part#: |
MC100E175FNG |
Price: | $ 0.00 |
Product Category: | Integrated Circuits (ICs) |
Manufacturer: | ON Semiconductor |
Short Description: | IC LATCH 9BIT PARITY ECL 28-PLCC |
More Detail: | D-Type Transparent Latch 1 Channel 9:9 IC Standard... |
DataSheet: | ![]() |
Quantity: | 1000 |
1 +: | 0.00000 |
Series: | 100E |
Packaging: | Tube |
Part Status: | Obsolete |
Logic Type: | D-Type Transparent Latch |
Circuit: | 9:9 |
Output Type: | Standard |
Voltage - Supply: | 4.2 V ~ 5.5 V |
Independent Circuits: | 1 |
Delay Time - Propagation: | 800ps |
Current - Output High, Low: | -- |
Operating Temperature: | 0°C ~ 85°C |
Mounting Type: | Surface Mount |
Package / Case: | 28-LCC (J-Lead) |
Supplier Device Package: | 28-PLCC (11.51x11.51) |
Base Part Number: | 100E175 |
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MC100E175FNG is a type of logic latch device, which are electronic components that are used to store and transfer data. The device normally comprises of a memory cell and the associated logic gates. Generally, the ICs (integrated circuits) of this family have two types of inputs, ‘set’ and ‘reset’ and two types of outputs, Q and Q~ (complementary).
In terms of application, logic latches are typically used as a ‘memory’ system of sorts. The stored or retained data, essentially the state of ‘set’ or ‘reset’ is easily retrievable. Memory latches are widely used in various digital circuits such as arithmetic units, ROMs, FIFOs and shift registers.
The MC100E175FNG is a CMOS low power logic latch. It has an input set (SET) and an input reset (RST) as well as an output enable (EN), input high impedance enable (CE) and wake (WAKE). The device is designed to provide a low voltage, low power, single-ended SET and RST latch with independent outputs. It utilizes ECL (emitter-coupled logic) design techniques and can switch between high and low levels at up to 200 mA peak current.
The working principle of the logic latch is fairly simple. The latch is essentially a flip flop circuit, which means it has two outputs that are in opposite states. When the ‘set’ or ‘reset’ inputs are enabled, this will cause the outputs (Q and Q) to switch to either the ‘set’ or ‘reset’ output. This will then remain in that state until a new input is enabled. The EN and CE inputs are used to enable the device by providing an active low voltage, thus when these pin states are high, the latch is not active, and the outputs will remain in their last set state.
The MC100E175FNG has a maximum operating data rate of 150MHz, making it well-suited for high-speed applications such as FPGA (Field Programmable Gate Arrays) designs. It is also a very low power device, with a typical power consumption of just 10 μW for a single unit. This makes it ideal for low power, battery-powered applications.
In summary, the MC100E175FNG is a type of logic latch device used to store and transfer data. It is typically used as part of a memory storage unit and is used in many digital circuits. The device is capable of switching between high and low levels at up to 200 mA peak current. It is also low power and has a maximum operating data rate of 150MHz, making it well-suited for high speed applications.
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