| Allicdata Part #: | MC74AC373DWGOS-ND |
| Manufacturer Part#: |
MC74AC373DWG |
| Price: | $ 0.46 |
| Product Category: | Integrated Circuits (ICs) |
| Manufacturer: | ON Semiconductor |
| Short Description: | IC LATCH OCT TRANSP 3ST 20-SOIC |
| More Detail: | D-Type Transparent Latch 1 Channel 8:8 IC Tri-Stat... |
| DataSheet: | MC74AC373DWG Datasheet/PDF |
| Quantity: | 1000 |
| 1 +: | $ 0.46000 |
| 10 +: | $ 0.44620 |
| 100 +: | $ 0.43700 |
| 1000 +: | $ 0.42780 |
| 10000 +: | $ 0.41400 |
| Series: | 74AC |
| Packaging: | Tube |
| Part Status: | Active |
| Logic Type: | D-Type Transparent Latch |
| Circuit: | 8:8 |
| Output Type: | Tri-State |
| Voltage - Supply: | 2 V ~ 6 V |
| Independent Circuits: | 1 |
| Delay Time - Propagation: | 7ns |
| Current - Output High, Low: | 24mA, 24mA |
| Operating Temperature: | -40°C ~ 85°C |
| Mounting Type: | Surface Mount |
| Package / Case: | 20-SOIC (0.295", 7.50mm Width) |
| Supplier Device Package: | 20-SOIC |
| Base Part Number: | 74AC373 |
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The MC74AC373DWG is a Quad D Flip-Flop chip made by ON Semiconductor. It is part of the AC Logic family, which is designed to be rugged and high-performance while also reducing power consumption. The MC74AC373DWG is designed to operate with power supply voltages as low as 2.7 volts and as high as 5.5 volts. It is rated for operation over the full military temperature range (55°C to 125°C).
The MC74AC373DWG can be used in a variety of logic applications, including memory and data-flow control, bit-slice processing, and sequential logic. The chip has four independent D-type flip-flops, each with a data input (D) and a Data Output (Q). The Data Output can also be connected to the Data Input, allowing the device to act as a synchronous latch.
The MC74AC373DWG is a rising-edge triggered device and has a clock enable input (CE), which is used to enable or disable the clock. When the clock enable input is low, the device simply maintains its Data Input value. When the clock enable input is high, any rising edge on the Clock input causes the Data Input to be latched, and the data is held until the next rising edge on the Clock input. When used as a latch, the Data Output is kept in the same state as the Data Input. The master reset (MR) input is used to reset the device, setting all Data Outputs to the low state.
The MC74AC373DWG also has buffered Clock and Master Reset outputs, as well as active-low Clock Enable (CE-) and Master Reset (MR-) outputs. These outputs can be used to daisy-chain multiple devices and provide a low-noise source for synchronous logic.
The MC74AC373DWG is a versatile and reliable device for various logic applications. It is suitable for use in high-speed, high-density systems, consumer electronics, and telecommunications. In addition, the device meets all requirements for UL safety certification, making it a good choice for use in safety-critical applications.
The specific data is subject to PDF, and the above content is for reference
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MC74AC373DWG Datasheet/PDF