MCIMX6Y2CVM08AB

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1. Describe

The i.MX 6ULL processor represents NXP's latest achievement in integrating multimedia products, targeting the growth of the connected device market by providing high-performance integration of processing functions. The i.MX 6ULL is a high-performance, ultra-efficient feature, and NXP's advanced processor family implements an Arm Cortex®-A7 core running at up to 792 MHz. The i.MX 6ULL includes an integrated power management module that reduces the complexity of external power supplies and simplifies power sequencing. Each processor in the family offers a variety of memory interfaces, including LPDDR2, DDR3, DDR3L, raw and managed NAND flash, NOR flash, eMMC, Quad SPI, and for connecting peripherals such as WLAN, Bluetooth™, GPS, various additional interface sensors for displays and cameras).

2. Feature

    1. Support for a single Arm Cortex-A7 MPCore (with TrustZone) with:

        - 32 KB L1 instruction cache

        - 32 KB L1 data cache

        - Private timer and watchdog

        - Cortex-A7 NEON Media Processing Engine (MPE) coprocessor

    2. Generic Interrupt Controller (GIC) supporting 128 interrupts

    3. Global timer

    4. Snoop Control Unit (SCU)

    5. 128 KB unified I/D L2 cache

    6. Single-master AXI bus interface output for L2 cache

    7. Core frequency (including Neon and L1 cache)

    8. NEON MPE coprocessor

        - SIMD media processing architecture

        - NEON register file with 32x64-bit general purpose registers

        - NEON integer execution pipeline (ALU, Shift, MAC)

        - NEON double single precision floating point execution pipeline (FADD, FMUL)

        - NEON load/store and permutation pipelines

        - 32 double-precision VFPv3 floating-point registers

3. Processor application

    1. Telematics

    2. Music player

    3. connected devices

    4. IoT Gateway

    5. Access Control Panel

    6. Human Machine Interface (HMI)

    7. Portable healthcare

    8. IP telephony

    9. Smart Appliances

  10. E-reader

4. Processor Features

    1. Single-core Arm Cortex-A7 – The single-core A7 provides cost-effective and low-power solution.

    2. Multi-level memory system – The processor's multi-level memory system is based on L1 instruction and data caches, L2 caches, and internal and external memory. The processor supports many types of external memory devices, including DDR3, low voltage DDR3, LPDDR2, NOR Flash, NAND Flash (MLC and SLC), OneNAND™, Quad SPI, and Managed NAND, including eMMC up to version 4.4/4.41/4.5.

    3. Smart Speed Technology – Power management implemented throughout the IC, enabling multimedia functions and peripherals to consume minimal power in active and various low-power power modes.

    4. Dynamic Voltage and Frequency Scaling – Scale voltage to improve device power efficiency and frequency to optimize performance.

    5. Multimedia Powerhouse – The processor's multimedia performance is enhanced by a multi-level enhanced cache system, NEON™ MPE (Media Processor Engine) coprocessor, programmable Smart DMA (SDMA) controller, asynchronous audio sample rate converter, electrophoretic display ( EPD) controller and pixel processing pipeline (PXP) supporting 2D image processing, including color space conversion, scaling, alpha blending and rotation.

    6. 2 Ethernet interfaces - 2 10/100 Mbps Ethernet controllers.

    7. Human Machine Interface - Each processor supports a digital parallel display interface.

    8. Interface flexibility—each processor supports connections to multiple interfaces: two Hi-Speed USB on-the-go with PHY, multiple expansion card ports , two 12-bit ADC modules for a total of up to 10 input channels and two CAN ports.

    9. Advanced Security - The processor provides hardware-enabled security features to ensure security E-Commerce, Digital Rights Management (DRM), Information Encryption, Secure Boot, AES-128 Encryption, SHA-1, SHA-256 hardware acceleration engine and security software downloads.

  10. Integrated power management – the processor integrates a linear regulator and generates it internally Voltage levels for different domains. This significantly simplifies system power management structure.