MSP430F5342IRGZT

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1. Describe

TI's MSP family of ultra-low-power microcontrollers consists of multiple devices with different sets of peripherals for various applications. Combined with a wide range of low-power modes, this architecture is optimized to extend battery life in portable measurement applications. The microcontroller has a powerful 16-bit RISC CPU, 16-bit registers and a constant generator, Helps maximize code efficiency. The Digitally Controlled Oscillator (DCO) allows the microcontroller to wake up from low-power mode to active mode in 3.5 µs (typ). The MSP430F534x MCU configuration features four 16-bit timers, a high-performance 12-bit ADC, two USCIs, a hardware multiplier, DMA, an RTC module with alarms, and 38 I/O pins.

2. Feature

    1. Low supply voltage range: 3.6 V to 1.8 V

    2. Ultra low power consumption

        – Active Mode (AM): All system clock activity

        – Standby mode (LPM3)

        – Off mode (LPM4)

        – Off mode (LPM4.5)

    3. Wake-up from standby in 3.5 µs (typ.)

    4. 16-bit RISC architecture, extended memory, system clock up to 25MHz

    5. Flexible power management system

        – Fully integrated LDO with programmable regulated core supply voltage

        – Supply voltage monitoring, monitoring and power down

    6. Unified clock system

        – FLL control loop for frequency stabilization

        – Low-power low-frequency internal clock source (VLO)

        – Low frequency trimmed internal reference source (REFO)

        – 32kHz watch crystal (XT1)

        – High frequency crystal up to 32 MHz (XT2)

    7. 16-bit timers TA0, Timer_A with five capture/compare registers

    8. 16-bit timers TA1, Timer_A with three capture/compare registers

    9. 16-bit timers TA2, Timer_A with three capture/compare registers

  10. 16-bit timers TB0, Timer_B with seven capture/compare shadow registers

  11. Two Universal Serial Communication Interfaces (USCI)

        – USCI_A0 and USCI_A1 each support:

        – USCI_B0 and USCI_B1 each support:

  12. 12-bit analog-to-digital converter (ADC) with internal reference, track-and-hold, and autoscan

  13. Comparators

  14. Hardware multiplier supports 32-bit operations

  15. Serial onboard programming, no external programming voltage required

  16. 3-channel internal DMA

  17. Basic timer with RTC function

  18. Device comparison summarizes available family members

3. Application

1. Analog sensor system 

2. Digital sensor system

3. Data Logger

4. Universal application
   

4. Pin configuration

5. Digital input/output

    1. All individual I/O bits are independently programmable.

    2. Any combination of input, output and interrupt conditions is possible.

    3. The pull-up or pull-down of all ports is programmable.

    4. Programmable drive strength for all ports.

    5. Edge-selectable interrupt and LPM4.5 wake-up input functions are available for all bits of ports P1 and P2.

    6. All instructions support read and write access to port control registers.

    7. Ports can be accessed by byte (P1 to P8) or pair by word (PA to PD).

6. Operating mode

    1. Active Mode (AM)

        – All clocks are active

    2. Low Power Mode 0 (LPM0)

        – CPU is disabled

        – ACLK and SMCLK remain active

        – MCLK is disabled

        – FLL loop control remains active

    3. Low Power Mode 1 (LPM1)

        – CPU is disabled

        – FLL loop control disabled

        – ACLK and SMCLK remain active

        – MCLK is disabled

    4. Low Power Mode 2 (LPM2)

        – CPU is disabled

        – MCLK, FLL loop control and DCOCLK disabled

        – The DC generator of the DCO remains enabled

        – ACLK remains active

    5. Low Power Mode 3 (LPM3)

        – CPU is disabled

        – MCLK, FLL loop control and DCOCLK disabled

        – The DC generator of the DCO is disabled

        – ACLK remains active

    6. Low Power Mode 4 (LPM4)

        – CPU is disabled

        – ACLK is disabled

        – MCLK, FLL loop control and DCOCLK disabled

        – The DC generator of the DCO is disabled

        – Crystal oscillator stopped

        – Complete data retention

    7. Low Power Mode 4.5 (LPM4.5)

        – Internal regulator disabled

        – No data retention

        – Wakeup input from RST/NMI, P1 and P2

7. CPU

The MSP430F5342IRGZT CPU has a 16-bit RISC architecture that is highly transparent to the application. All operations other than program flow instructions perform seven addressing modes for source operands and four addressing modes for destination operands as register operations. The CPU integrates 16 registers to shorten the instruction execution time. The execution time for register-to-register operations is one cycle of the CPU clock. Four registers, R0 to R3, are used as the program counter, stack pointer, status register and constant generator, respectively. The remaining registers are general-purpose registers. Peripherals connect to the CPU using data, address, and control buses. Peripherals can manage all commands.