PIC24FJ256GB406-I/PT

Due to market price fluctuations,if you need to purchase or consult the price.You can contact us or emial to us:   sales@allicdata.com

1. Dual-partition flash memory with real-time update function

    1. Able to accommodate two independent software applications, Including bootloader

    2. Allows simultaneous programming of a partition Execute application code from another

    3. Allow runtime switching between active partitions

2. Universal Serial Bus Features

    1. USB v2.0 On-The-Go (OTG) Compliant

    2. Dual Role Capable – Can Act as Either Host or Peripheral

    3. Low-Speed (1.5 Mb/s) and Full-Speed (12 Mb/s) USB Operation in Host mode

    4. Full-Speed USB Operation in Device mode

    5. High-Precision PLL for USB

    6. USB Device mode Operation from FRC Oscillator – No Crystal Oscillator Required

    7. Supports up to 32 Endpoints (16 bidirectional):

        - USB module can use any RAM locations on the device as USB endpoint buffers

    8. On-Chip USB Transceiver with Interface for Off-Chip USB Transceiver

    9. Supports Control, Interrupt, Isochronous and Bulk Transfers

  10. On-Chip Pull-up and Pull-Down Resistors

3. Special Microcontroller Features

    1. 20,000 Erase/Write Cycle Endurance, Typical

    2. Data Retention: 20 Years Minimum

    3. Self-Programmable under Software Control

    4. Supply Voltage Range of 2.0V to 3.6V

    5. Two On-Chip Voltage Regulators (1.8V and 1.2V) for Regular and Extreme Low-Power Operation

    6. Programmable Reference Clock Output

    7. In-Circuit Serial Programming™ (ICSP™) and In-Circuit Emulation (ICE) via 2 Pins

    8. JTAG Boundary Scan Support

    9. Fail-Safe Clock Monitor (FSCM) Operation:

        - Detects clock failure and switches to on-chip, Low-Power RC (LPRC) Oscillator

  10. Power-on Reset (POR), Power-up Timer (PWRT) and Oscillator Start-up Timer (OST)

  11. Separate Brown-out Reset (BOR) and Deep Sleep Brown-out Reset (DSBOR) Circuits

  12. Programmable High/Low-Voltage Detect (HLVD)

  13. Flexible Watchdog Timer (WDT) with its Own RC Oscillator for Reliable Operation

  14. Standard and Ultra Low-Power Watchdog Timers (ULPW) for Reliable Operation in Standard and Deep Sleep modes

  15. Temperature Range: -40°C to +85°C

4. Extreme Low-Power Features

    1. Multiple Power Management Options for Extreme Power Reduction:

        - VBAT allows for lowest power consumption on backup battery (with or without RTCC)

        - Deep Sleep allows near total power-down with the ability to wake-up on external triggers

        - Sleep and Idle modes selectively shut down peripherals and/or core for substantial power reduction and fast wake-up

        - Doze mode allows CPU to run at a lower clock speed than peripherals

    2. Alternate Clock modes allow On-the-Fly Switching to a Lower Clock Speed for Selective Power Reduction

    3. Extreme Low-Power Current Consumption for Deep Sleep:

        - WDT: 650 nA @ 2V typical

        - RTCC: 650 nA @ 32 kHz, 2V typical

        - Deep Sleep current, 60 nA typical

    4. 160 µA/MHz in Run mode

5. High-Performance CPU

    1. Modified Harvard Architecture

    2. Up to 16 MIPS Operation @ 32 MHz

    3. 8 MHz Internal Oscillator:

        - 96 MHz PLL option

        - Multiple clock divide options

        - Run-time self-calibration capability for maintaining better than ±0.20% accuracy

        - Fast start-up

    4. 17-Bit x 17-Bit Single-Cycle Hardware Fractional/Integer Multiplier

    5. 32-Bit by 16-Bit Hardware Divider

    6. 16 x 16-Bit Working Register Array

    7. C Compiler Optimized Instruction Set Architecture

    8. Two Address Generation Units for Separate Read and Write Addressing of Data Memory

6. Pin Diagrams

7. Package overview