PL560-48OC-R Allicdata Electronics
Allicdata Part #:

PL560-48OC-R-ND

Manufacturer Part#:

PL560-48OC-R

Price: $ 0.00
Product Category:

Integrated Circuits (ICs)

Manufacturer: Microchip Technology
Short Description: IC VCXO 160MHZ 16TSSOP
More Detail: N/A
DataSheet: PL560-48OC-R datasheetPL560-48OC-R Datasheet/PDF
Quantity: 1000
1 +: 0.00000
Stock 1000Can Ship Immediately
$ 0
Specifications
Differential - Input:Output: No/Yes
Base Part Number: PL560
Supplier Device Package: 16-TSSOP
Package / Case: 16-TSSOP (0.173", 4.40mm Width)
Mounting Type: Surface Mount
Operating Temperature: 0°C ~ 70°C
Voltage - Supply: 2.97 V ~ 3.63 V
Divider/Multiplier: No/Yes
Frequency - Max: 160MHz
Series: --
Ratio - Input:Output: 1:1
Number of Circuits: 1
Output: LVPECL
Input: Crystal
PLL: No
Part Status: Discontinued at Digi-Key
Packaging: Tape & Reel (TR) 
Description

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Clock/Timing - Clock Generators, PLLs, Frequency Synthesizers

PL560-48OC-R is a frequency synthesizer with a narrow pull range of +/-2.5 ppm over a wide operating temperature range; this robustness is well suited to networking, communications, instrumentation and defense applications where the changing temperature environment could destabilize the system. PL560-48OC-R offers excellent jitter performance when used in systems such as with DOCSIS 3.1 down stream frequencies.

PL560-48OC-R is a frequency synthesis product composed of a full-duplex, triple-modulus prescaler, a digital frequency detector/divider chain and a 7-bit adjustable frequency divider that uses flexible input reference sources. It provides an accurate and stable output frequency with very low jitter and represents an ideal solution for communications, instrumentation and defense systems where robustness, performance and power savings are an important consideration. The PLL560-48OC-R is a low power, low-cost frequency synthesizer that provides a full-duplex output divider ratio range from 8/1 to 64/1.

The PL 560-48OC-R utilizes the basic principle of a PLL (phase locked loop) to generate an output frequency from an input reference frequency. By dividing the input reference frequency through the pre-scaler, it locks onto the frequency of the reference source at 800mV to 1100mV. The output frequency is then divided proportional to the selected divisor. The divisor will vary from 8 to 64. The PLL560-48OC-R is capable of handling a wide range of reference clock inputs and has a wide operating temperature range (-40°C to +85°C).

The PL560-48OC-R is based on an 8/1 pre-scaler and digital frequency detector. This combination ensures at the input clock frequency is divided and equal to the output clock frequency. The digital frequency detector is designed to control the rate of change in the output frequency. The loop will recognize small changes in the input frequency and open the loop until the output frequency is again equal to the input frequency. This feature can be used to reduce the jitter.

The PL560-48OC-R is a highly reliable and cost efficient PLL based frequency synthesizer. The device uses a combination of a phase-locked loop and divider topology and an efficient prescaler. The phase-locked loop ensures precise phase and frequency tracking of the input clock reference frequency and a divider topology provides accurate division and flexible frequency ratios. The PLL also offers excellent jitter and phase noise performance. The device is available in a compact 25-pin TSSOP package.

The PL560-48OC-R is an ideal solution for a range of applications including communications, instrumentation and defense. It is a low cost, low power frequency synthesizer ideal for both stand-alone and embedded systems where excellent jitter performance, robustness and power savings are key considerations.

The specific data is subject to PDF, and the above content is for reference

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