R5F10MMEDFB#30

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1. Features 

    1. Ultra-low power consumption technology

        - VDD = single power supply voltage of 1.9 to 5.5 V

        - HALT mode

        - STOP mode

        - SNOOZE mode

    2. RL78 CPU core

        - CISC architecture with 3-stage pipeline

        - Minimum instruction execution time: Can be changed from high speed to ultra-low speed 

        - Multiply/divide/multiply & accumulate instructions are supported.

        - Address space: 1 MB

        - General-purpose registers: (8-bit register × 8) × 4 banks

        - On-chip RAM: 6 KB or 8 KB

    3. Code flash memory

        - Code flash memory: 64 KB or 128 KB

        - Block size: 1 KB 

        - Prohibition of block erase and rewriting (security function)

        - On-chip debug function

        - Self-programming (with boot swap function/flash shield window function) 

    4. High-speed on-chip oscillator

        - Select from 24 MHz (TYP.), 12 MHz (TYP.), 6 MHz (TYP.), and 3 MHz (TYP.)

        - High accuracy: 1.0 % (VDD = 1.9 to 5.5 V, TA = 20 to +85°C)

        - On-chip high-speed on-chip oscillator clock frequency correction function 

    5. Operating ambient temperature

        - TA = -40 to +85°C 

    6. Power management and reset function

        - On-chip power-on-reset (POR) circuit

        - On-chip voltage detector (LVD) (Select interrupt and reset from 11 levels)

    7. Data transfer controller (DTC)

        - Transfer mode: Normal mode, repeat mode, block mode

        - Activation source: Start by interrupt sources (40 sources)

        - Chain transfer function

    8. Serial interface

        - CSI: 1channel

        - UART/UART (LIN-bus supported): 3 channels

        - I2C/Simplified I2C communication: 3 channels

        - IrDA: 1 channel

    9. Timer

        - 16-bit timer: 8 channels

        - 12-bit interval timer: 1 channel

        - 8-bit interval timer: 4 channels

        - Real-time clock 2: 1 channel (calendar for 99 years, alarm function, and clock correction function)

        - Watchdog timer: 1 channel (operable with the dedicated low-speed on-chip oscillator)

        - Oscillation stop detection circuit: 1 channel 

  10. LCD controller/driver

        - Internal voltage boosting method, capacitor split method, and external resistance division method are switchable

        - Segment signal output: 34 

        - Common signal output: 4 

  11. A/D converter

        - 8/10-bit resolution A/D converter (VDD = 1.9 to 5.5 V): 4 or 6 channels

        - 24-Bit ∆Σ A/D converter: 3 or 4 channels

        - Internal reference voltage (1.45 V) and temperature sensor

  12. Comparator

        - 2 channels 

        - Operation mode: Comparator high-speed mode, comparator low-speed mode, or window mode 

        - External reference voltage and internal reference voltage are selectable

  13. I/O port

        - I/O port: 53 or 69 (N-ch open drain I/O [withstand voltage of 6 V]: 3, N-ch open drain I/O [VDD withstand voltage]: 13) 

        - Can be set to N-ch open drain, TTL input buffer, and on-chip pull-up resistor

        - Different potential interface: Can connect to a 1.8/2.5/3 V device

        - On-chip clock output/buzzer output controller

  14. Others

        - On-chip BCD (binary-coded decimal) correction circuit

        - On-chip battery backup function