SN65MLVD200AD

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The SN75MLVD200AD provides a differential non-inverting buffer with a slew rate control circuit that enables the rate at which the output swings to follow the rate of the input signals. This device is a member of the SN75MLVD2xx family of integrated circuits for interfacing to low voltage differential signaling, LVDS, systems. The SN75MLVD200AD is a 3.3V monolithic device with one differential LVDS-input and one LVDS-output. The supply current rating is negligible due to the 400-Ω differential line termination. The input characteristics of the device are optimized for PCS (peer-to-peer) applications and are both low impedance and low capacitance, achieving high-speed transmission with minimal power consumption. The output section has a unique slew-rate control circuit, allowing the slew rate of the LVDS output to be optimized to the application. Both the output amplitude and slew rate are user-adjustable. The SN75MLVD200AD is available in two different packages.

Application Field

The SN75MLVD200AD is typically used in systems requiring low power implementation which supports data rates up to 1250 Mbps. The slew rate control reduces ringing on the output signal over all temperature ranges, ensuring minimal distortion of the signal as it passes through the device. Applications include: serial data buses such as Fibre Channel, InfiniBand, and Gigabit Ethernet; video transport such as Digital Video Broadcast (DVB); inter-panel applications for imaging, video and other data-oriented applications; low jitter clocks for clock and data recovery; external device interconnections such as PCMCIA, PC card, and Compact Flash; backplane communications; and parallel or serial links between data processing subsystems.

Working Principle

The SN75MLVD200AD has one differential voltage signal input and one differential voltage signal output. The input section is optimised to minimise power consumption while the output section will slew-rate the signal. The slew rate is user adjustable.

The output voltage signal is obtained after the non-inverting starting point at the input stage, then adding a differential voltage to the output. The differential voltage is determined by the input stage, which then controls the slew rate of the output voltage signal. The slew rate is adjustable to optimise performance according to the application requirements.

The SN75MLVD200AD provides 3.3V operation and very low total power consumption, comfortable temperature ranges. It has extremely low input capacitance and very low output capacitance. Its low power and low capacitance features make it suitable for PCS (peer-to-peer) applications.

Due to its unique slew rate control circuit, the LVDS output of the SN75MLVD200AD is ensured to be free of ringing and minimum distortion over the entire temperature range, making it perfectly suitable for today’s high speed and low power transmission applications. Additionally, the input impedance and output load impedances are selectable, allowing the SN75MLVD200AD to be adapted to many different kinds of system configurations.

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