SN74LS173ADR Allicdata Electronics
Allicdata Part #:

SN74LS173ADR-ND

Manufacturer Part#:

SN74LS173ADR

Price: $ 0.00
Product Category:

Integrated Circuits (ICs)

Manufacturer: Texas Instruments
Short Description: IC FF D-TYPE SNGL 4BIT 16SOIC
More Detail: N/A
DataSheet: SN74LS173ADR datasheetSN74LS173ADR Datasheet/PDF
Quantity: 1000
1 +: 0.00000
Stock 1000Can Ship Immediately
$ 0
Specifications
Max Propagation Delay @ V, Max CL: 25ns @ 5V, 45pF
Base Part Number: 74LS173
Package / Case: 16-SOIC (0.154", 3.90mm Width)
Mounting Type: Surface Mount
Operating Temperature: 0°C ~ 70°C (TA)
Current - Quiescent (Iq): 24mA
Voltage - Supply: 4.75 V ~ 5.25 V
Current - Output High, Low: 2.6mA, 24mA
Trigger Type: Positive Edge
Series: 74LS
Clock Frequency: 50MHz
Number of Bits per Element: 4
Number of Elements: 1
Output Type: Tri-State, Non-Inverted
Type: D-Type
Function: Master Reset
Part Status: Obsolete
Packaging: Tape & Reel (TR) 
Description

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Logic - Flip Flops are commonly used in a wide range of digital applications, such as in control systems, computer systems, communication systems and memory systems. The SN74LS173ADR is an example of a type of flip flop. This device is a Quad D-type Synchronous Master-Slave Flip Flop and is manufactured by Texas Instruments.

Application Field

The SN74LS173ADR is a 16-pin DIP which can be used in a wide range of applications. It is typically used control data storage, data transfer, data storage, data transfer and data functions in electronic systems. It is also used as a parallel-to-serial data converting device in communication systems and computer systems, as well as to design memory registers and multiplexer/demultiplexer applications.

Working Principle

The SN74LS173ADR is composed of a pair of gated D type flip-flops, each containing a set-reset signal and a clock signal. When the clock is high, the output state of the flip-flop is determined by the Set-Reset input signal. A logic "1" signal on the Set input will cause the output to go high, and a logic "1" signal to the Reset input will cause the output to go low; the clock signal does not change the output state. If both Set and Reset inputs are at Logic "1" simultaneously, the Priority Input (also called the "Preset") is used to determine the resulting output state.

The SN74LS173ADR also has an overriding asynchronous reset control. When this input is a Logic "1", the output is forced to a logical low state regardless of the input state.

The SN74LS173ADR has both inputs and outputs which are synchronized and synchronous to the rising edge of the clock input signal. The device can be used in data transfer and data register applications such as counter/shift register and bidirectional bus applications. Each of the four flip-flops in the chip has independent Set and Reset inputs, clock input and an asynchronous clear input.

The SN74LS173ADR is designed for low-power and can operate from a voltage range of 2.4V to 5.5V (Transistor-Transistor logic) and 3V to 10V (Schottky logic). The device has maximum frequency of 24MHz, and a typical propagation delay of 8ns.

Overall, the SN74LS173ADR is a versatile and reliable Flip-Flop device that offers excellent performance. It can be used to design a wide range of data processing, data transfer, data storage and multiplexer/demultiplexer applications.

The specific data is subject to PDF, and the above content is for reference

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