TCA9539RTWR

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1. Describe

The TCA9539RTWR is a 24-pin device that provides 16-bit general purpose parallel input and output (I/O) expansion for a two-wire bidirectional I2C bus (or SMBus protocol). The device operates from a supply voltage (VCC) range of 1.65V to 5.5V. The device supports 100-kHz (I2C standard mode) and 400-kHz (I2C fast mode) clock frequencies. When switches, sensors, buttons, LEDs, fans and other similar devices require additional I/O, I/O expanders such as the TCA9539 provide an easy solution. Features of the TCA9539RTWR include the generation of an interrupt on the INT pin when the input port changes state. The A0 and A1 hardware-selectable address pins allow up to four TCA9539RTWR devices on the same I2C bus. The device can be reset to its default state by cycling the power and causing a power-on reset. Additionally, the TCA9539 has a hardware RESET pin that can be used to reset the device to its default state.

2. Feature

    1. I2C to parallel port expander

    2. Low standby current consumption

    3. Open-drain active-low interrupt output

    4. Active low reset input

    5. 5V tolerant I/O ports

    6. Compatible with most microcontrollers

    7. 400kHz fast I2C bus

    8. Input and output configuration registers

    9. Polarity Inversion Register

  10. Internal power-on reset

  11. Trouble-free startup

  12. Noise filters on SCL and SDA inputs

  13. Addressed via two hardware address pins, up to four devices can be used

  14. Latch output with high current drive capability for direct LED drive

  15. Latch-up performance over 100 mA per JESD 78, Class II

  16. ESD protection exceeds JESD 22

        – 2000-V mannequin (A114-A)

        – 1000V charging device model (C101)

3. Application

    1. Server

    2. Routers (telecommunications switching equipment)

    3. PC, Smartphone

    4. automated industry

    5. I2C GPIO expansion

4. Pin configuration

5. Feature Description

    1. I/O Port

        When an I/O is configured as an input, FETs Q1 and Q2 are off, which creates a high-impedance input. The input voltage may be raised above VCC to a maximum of 5.5 V. If the I/O is configured as an output, Q1 or Q2 is enabled, depending on the state of the Output Port register. In this case, there are low-impedance paths between the I/O pin and either VCC or GND. The external voltage applied to this I/O pin must not exceed the recommended levels for proper operation.

    2. RESET Input

        A reset can be accomplished by holding the RESET pin low for a minimum of tW. The TCA9539RTWR registers and I2C/SMBus state machine are held in their default states until RESET is once again high. This input requires a pull-up resistor to VCC, if no active connection is used.

    3. Interrupt (INT) Output

        An interrupt is generated by any rising or falling edge of the port inputs in the input mode. After time tiv, the signal INT is valid. Resetting the interrupt circuit is achieved when data on the port is changed to the original setting or data is read from the port that generated the interrupt. Resetting occurs in the read mode at the acknowledge (ACK) bit after the rising edge of the SCL signal. Note that the INT is reset at the ACK just before the byte of changed data is sent. Interrupts that occur during the ACK clock pulse can be lost (or be very short) because of the resetting of the interrupt during this pulse. Each change of the I/Os after resetting is detected and is transmitted as INT. Reading from or writing to another device does not affect the interrupt circuit, and a pin configured as an output cannot cause an interrupt. Changing an I/O from an output to an input may cause a false interrupt to occur if the state of the pin does not match the contents of the Input Port register. Because each 8-bit port is read independently, the interrupt caused by port 0 is not cleared by a read of port 1, or vice versa. INT has an open-drain structure and requires a pull-up resistor to VCC.