TPS51200MDRCTEP

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1. Describe

The TPS51200MDRCTEP device is a sink and source double data rate (DDR) termination regulator designed for low input voltage, low cost, low noise systems where space is a critical consideration. The TPS51200MDRCTEP maintains fast transient response and requires only a minimum output capacitance of 20 μF. The TPS51200MDRCTEP supports remote sensing capabilities and all power requirements for DDR, DDR2, DDR3, low-power DDR3, and DDR4 VTT bus termination. Additionally, the TPS51200MDRCTEP provides an open-drain PGOOD signal to monitor output regulation and an EN signal that can be used to discharge the VTT during S3 (suspend to RAM) in DDR applications. The TPS51200-EP is packaged in a thermally efficient 10-pin VSON thermal pad package with green and lead-free ratings. The rated temperature range is –55°C to +125°C.

2. Feature

    1. Input voltage: 2.5-V rail and 3.3-V rail supported

    2. VLDOIN voltage range: 1.1 V to 3.5 V

    3. Sink and source termination regulators include voltage drop compensation

    4. Memory end application (DDR) requires at least 20µF output capacitor (typically 3 × 10µF MLCC)

    5. PGOOD monitors output regulation

    6. EN input

    7. REFIN input allows flexible input tracking directly or through resistive dividers

    8. Remote Sensing (VOSNS)

    9. ±10mA buffered reference (REFOUT)

  10. Built-in soft-start, UVLO and OCL

  11. Thermal shutdown

  12. Compliant with DDR and DDR2 JEDEC specifications

  13. Supports DDR3, low power DDR3 and DDR4 VTT applications

  14. 10-pin VSON package with thermal pad

  15. Supports defense, aerospace and medical applications

        – Controlled baseline

        – Assembly and test site

        – Manufacturing location

        – Available in military (–55°C to 125°C) temperature range

        – Extend product life cycle

        – Extended Product Change Notifications

        – Product traceability

3. Application

    1. Memory termination regulators for DDR, DDR2, DDR3, low power DDR3 and DDR4

    2. Laptops, Desktops and Servers

    3. Telecommunications and data communications

    4. base station

    5. LCD and Plasma TVs

    6. copiers and printers

    7. Set-top box

4. Pin configuration

5. Pin Description

6. Feature Description

    1. Sink and Source Regulator (VO Pin)

        The TPS51200MDRCTEP is a sink and source tracking termination regulator specifically designed for low-input voltage, low-cost, and low-external component count systems where space is a key application parameter. The device integrates a high-performance, low-dropout (LDO) linear regulator that is capable of both sourcing and sinking current. The LDO regulator employs a fast feedback loop so that small ceramic capacitors can be used to support the fast load transient response. To achieve tight regulation with minimum effect of trace resistance, connect a remote sensing terminal, VOSNS, to the positive terminal of each output capacitor as a separate trace from the high-current path from VO.

    2. Enable Control (EN Pin)

        When EN is driven high, the VO regulator begins normal operation. When the device drives EN low, VO discharges to GND through an internal 18-Ω MOSFET. REFOUT remains on when the device drives EN low. Ensure that the EN pin voltage remains lower than or equal to VVIN at all times.

    3. Powergood Function (PGOOD Pin)

        The TPS51200-EP device provides an open-drain PGOOD output that goes high when the VO output is within ±20% of REFOUT. PGOOD de-asserts within 10 μs after the output exceeds the size of the PGOOD window. During initial VO start-up, PGOOD asserts high 2 ms (typ) after the VO enters PGOOD window. Because PGOOD is an open-drain output, a pull-up resistor with a value between 1 kΩ and 100 kΩ, placed between PGOOD and a stable active supply voltage rail, is required.

    4. Tracking Start-up and Shutdown

        The TPS51200-EP also supports tracking start-up and shutdown when the EN pin is tied directly to the system bus and not used to turn on or turn off the device. During tracking start-up, VO follows REFOUT once REFIN voltage is greater than 0.39 V. REFIN follows the rise of VDDQ rail through a voltage divider. The typical softstart time (tSS) for the VDDQ rail is approximately 3 ms, however it may vary depending on the system configuration. The soft-start time of the VO output no longer depends on the OCL setting, but it is a function of the soft-start time of the VDDQ rail. PGOOD is asserted 2 ms after VVO is within ±20% of REFOUT. During tracking shutdown, the VO pin voltage falls following REFOUT until REFOUT reaches 0.37 V. When REFOUT falls below 0.37 V, the internal discharge MOSFETs turn on and quickly discharge both REFOUT and VO to GND. PGOOD is deasserted once VO is beyond the ±20% range of REFOUT. 

7. Application Information

The TPS51200-EP device is specifically designed to power up the memory termination rail . The DDR memory termination structure determines the main chara teristics of the VTT rail, which is to be able to sink and source current while maintaining acceptable VTT tolerance.