XC17512LPC20I

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Memory - Configuration Proms for FPGAs

XC17512LPC20I promises configurability, performance, and reliability with advantages to support a wide range of applications. The XC17512LPC20I is the most advanced programmable logic device (PLD) and field programmable gate array (FPGA) supporting a broad array of user-defined functions. The FPGA integrates hundreds to thousands of gates and thousands of embedded memory blocks. It also offers embedded and external interfaces to interface with external systems. It provides the building blocks for components, system integration and integration of ultra-fast on-chip functions.

XC17512LPC20I field programmable gate array (FPGA) technology provide advantages when compared to ASICs and other CPLDs. By providing a design platform that can dynamically reconfigure itself, provide bus architecture flexibility, large amounts of I/O pins, clock domain crossing features, a wide range of design approach options, smaller package size and better performance, FPGAs provide a more efficient and cost-effective solution to many designs.

XC17512LPC20I configures the logic circuitry of the FPGA chip using internal or external memory configuration devices. These “Configuration PROMs” are used to program the FPGA circuit arrangement and behavior. The configuration process involves four steps: 1) downloading the bit stream or data file to the memory device, 2) initializing the memory device, 3) launching the configuration process, and 4) powering up the FPGA.

The XC17512LPC20I Configuration PROM can be programmed with simple bit stream files representing the FPGA design data. After the PROM is programmed, it is reset and a logic interface (e.g. serial or parallel) is used to initiate the reconfiguration process. After the PROM has been reset, the configuration controller within the FPGA will access the PROM, retrieve the bit stream from the memory device, and begin the configuration process. Once the configuration is complete, the FPGA is ready for operation.

In summary, XC17512LPC20I promises configurability, performance, and reliability with advantages to support a wide range of applications. An FPGAs architecture and configuration options allow applications to benefit from increased configurability and shorter time-to-market. The XC17512LPC20I packs large amounts of gates and memory, supports multiple I/O and clock domains, and uses static timing analysis to program the bits and configure the device properly. Moreover, its Configuration PROMs provide an integrated memory device to program the FPGA circuit arrangement and behavior.

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