What are the features and functions of AVR Microcontroller?
High reliability, strong function, high speed, low power consumption and low price have always been an important indicator to measure the performance of single-chip microcomputers. It is also a necessary condition for the single-chip computer to occupy the market and survive.
Early MCUs were mainly due to low process and design levels, high power consumption, and poor anti-interference performance. Therefore, a conservative solution was adopted: the higher frequency division factor was used to divide the clock, which made the instruction cycle long and the execution speed slow. Future CMOS microcontrollers have adopted measures such as increasing the clock frequency and reducing the division factor, but this state has not been completely changed (51 and 51 compatible). Although some RISCs have been introduced here, they still follow the practice of clock division.
The introduction of AVR MCU completely breaks the old design pattern, abolishes the machine cycle, abandons the complicated instruction computer (CISC) and pursues a complete instruction; uses a reduced instruction set, with words as the instruction length unit, and the content-rich operands The opcode is arranged in one word (this is the case for most single-cycle instructions in the instruction set). The instruction fetch cycle is short, and the instruction can be prefetched to realize the pipeline operation, so the instruction can be executed at high speed. Of course, this speed increase is backed by high reliability.
AVR microcontroller hardware architecture adopts a compromise between 8-bit and 16-bit machines, that is, using local register memory (32 register files) and single high-speed input/output schemes (ie, input capture registers, output compare match registers, and corresponding Control logic). The instruction execution speed (1Mips/MHz) is improved, the bottleneck phenomenon is overcome, the function is enhanced, and the overhead of peripheral management is reduced, the hardware structure is relatively simplified, and the cost is reduced. Therefore, AVR MCU has achieved an optimal balance in terms of software/hardware overhead, speed, performance and cost, and is a cost-effective single-chip microcomputer.
AVR MCU embeds high-quality Flash program memory, easy to erase, support ISP and IAP, easy to debug, develop, produce and update products. Built-in long-life EEProm saves critical data for long periods of time and avoids loss of power. The large-capacity RAM on the chip not only satisfies the general use, but also supports the use of high-level language development system programs and expands the external RAM like the MCS-51 microcontroller.
The I/O lines of the AVR MCU all have configurable pull-up resistors, which can be individually set to input/output, settable (initial) high-impedance input, and strong drive capability (can eliminate power-driven devices). The I/O port resources are flexible, powerful, and fully utilized.
AVR Microcontrollers have a variety of independent clock dividers for URAT, I2C, and SPI. Among them, the prescaler with up to 10 bits combined with the 8/16-bit timer can be used to set the timing of multiple grades by software setting the division factor. The AVR microcontroller uniquely uses a timer/counter (single) bidirectional count to form a triangular wave, and then cooperates with the output compare match register to generate a design method with variable duty cycle, variable frequency, and phase-variable square wave (ie, pulse width). Modulation output PWM)" is even more refreshing.
Enhanced high-speed synchronous/asynchronous serial port with hardware generated check code, hardware detection and check debugging, two-stage receive buffer, automatic adjustment of baud rate (received), masked data frame, etc. Reliability, convenient programming, more convenient to form a distributed network and realize complex applications of multi-machine communication system, serial port function greatly exceeds the serial port of MCS-51/96 single-chip microcomputer, plus AVR single-chip high-speed, short service time is short, so it can achieve high Baud rate communication.
Byte-oriented high-speed hardware serial interface TWI, SPI. TWI is compatible with I2C interface, and has the functions of ACK signal hardware transmission and identification, address recognition, bus arbitration, etc. It can realize multi-machine communication of all four combinations of master/slave receiving/sending. The SPI supports multi-machine communication of four combinations of master/slave.