SoC FPGA architecture for RISC-V real-time applications using RISC-V on Linux
SoC FPGA has a complete microprocessor subsystem based on RISC-V
With next-generation SoC FPGAs, Microsemi enables deterministic real-time behavior on a rich Linux platform. They contain a complete microprocessor subsystem based on RISC-V.
Microchip announced that it will expand its Mi-V ecosystem through its subsidiary. The new PolarFire SoC architecture provides deterministic asymmetric real-time multiprocessing (AMP) in a coherent multi-core CPU cluster for the Linux platform.
The RISC V Summit in Santa Clara, Calif., presents a highly-fired SoC architecture with a deterministic real-time asymmetric multiprocessing (AMP) Linux platform into a coherent multi-core CPU cluster. The architecture developed with SiFive has a flexible 2MB L2 memory subsystem that can be configured as a cache, scratchpad or random access memory (DMA). As a result, developers can implement deterministic embedded real-time applications simultaneously with a comprehensive operating system for a variety of thermal and space-constrained applications in collaborative networked IoT systems.
In the new era of computing driven by 5G, Machine Learning and Internet of Things (IoT), embedded system developers need a variety of Linux-based operating systems. These must meet higher energy efficiency, heat-restricted requirements for deterministic systems in the design environment, and meet high safety and reliability requirements. Traditional SoC FPGAs combine reconfigurable hardware with Linux-ready processing on a single chip, providing an ideal building block for customization. However, they consume too much power, have no proven security and reliability, or are based on inflexible and expensive computing architectures.
Polar Fire SoCs offer a wide range of debug functions, including 50 traces for instruction tracking, AXI bus monitors (advanced scalable interfaces) and FPGA fabric monitors for passive runtime configurations, and 2-channel logic analyzers for intelligent debug micro chip.
The Polar Fire SoC architecture includes features for more reliability and security, such as single error correction and a secure encryption core for all memory double error detection (SEC-DED), physical memory protection, and differential power analysis (DPA). Highly secure boat and 128 KB flash boot，
Evaluate and develop the polar-fired SoC-supported antmicro Renode system modeling platform, which is now integrated into Microchip's development environment (IDE) soft console with integrated Fire-based SoC embedded design. The Immediate Polar Fire SoC Development Kit can include the Fire-FPGA-Polar HiFive-Stolen Expansion Board with its RISC Microprocessor V Subsystem SiFives HiFive-Stolen Development Board.
Microchip also offers the new Mi-V Embedded Expert Program, a global network of partners that helps customers develop hardware/software for the PolarFire SoC. The program provides customer support throughout the product lifecycle, helping to accelerate design and reduce time-to-market. Members also receive direct technical support and early access to development platforms and semiconductor devices.