
Allicdata Part #: | 74ACT11373DWG4-ND |
Manufacturer Part#: |
74ACT11373DWG4 |
Price: | $ 1.76 |
Product Category: | Integrated Circuits (ICs) |
Manufacturer: | Texas Instruments |
Short Description: | IC D-TYPE LATCH SGL 3-ST 24SOIC |
More Detail: | D-Type Transparent Latch 1 Channel 8:8 IC Tri-Stat... |
DataSheet: | ![]() |
Quantity: | 1000 |
200 +: | $ 1.60196 |
Series: | 74ACT |
Packaging: | Tube |
Part Status: | Active |
Logic Type: | D-Type Transparent Latch |
Circuit: | 8:8 |
Output Type: | Tri-State |
Voltage - Supply: | 4.5 V ~ 5.5 V |
Independent Circuits: | 1 |
Delay Time - Propagation: | 8.5ns |
Current - Output High, Low: | 24mA, 24mA |
Operating Temperature: | -40°C ~ 85°C |
Mounting Type: | Surface Mount |
Package / Case: | 24-SOIC (0.295", 7.50mm Width) |
Supplier Device Package: | 24-SOIC |
Base Part Number: | 74ACT11373 |
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The 74ACT11373DWG4 device is a part of the 74ACT logic family. It includes two sets of latches, each with independent inputs and outputs. Each latch set has the capability to operate in the rising-edge-triggered or falling-edge-triggered mode. As a result, the 74ACT11373DWG4 is highly versatile and can be used in many applications that require fast timing and high performance.
The 74ACT11373DWG4 is essentially two D-type latches with three-state outputs. The latch typically requires two input signals, a data input (D) and a clock input (CK). When the clock input changes from a low to a high state, the output of the latch (Q) will change to reflect the input data. When the clock input returns to a low state, the output will remain unchanged until the next clock cycle.
The 74ACT11373DWG4 is commonly used in applications that require a high-speed data latch and bus drivers. It is also used in digital logic systems as a multiplexer and programmable logic devices (PLDs). The latches are also well-suited for logic synchronization, frequency division, and high-speed memory decoding. The three-state outputs enable the device to be used in bus and data lines that require multiple bus-driver performance.
The 74ACT11373DWG4 can be used in both latched and edge-triggered operation. In latched operation, the latch is provided with two inputs, D and CK. When the clock input is in a high state, the output of the latch will follow the data input. When the clock input returns to a low state, the output remains unchanged until the next period of the clock.
In edge-triggered operation, the pulse on the clock input will cause the output of the latch to change from its previous state to the current state of the data input. This mode, also known as a “one-shot”, is often used for applications that require precise timing, such as frequency division. Edge-triggered operation allows the latch to synchronize with higher-speed clock signals and to more accurately control the timing of the output.
The 74ACT11373DWG4 is versatile enough to be used in applications such as digital logic systems and frequency division systems, as well as many other applications. With its fixed output, it can operate as a data bus multiplexer or logic element. It is also useful in high-speed memory decoding where it can be used to accurately control the timing of the output. In addition, the logic can take advantage of the built-in hysteresis capability, which allows it to accurately interface with CMOS or TTL logic levels.
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