AD9577BCPZ-RL

The AD9577BCPZ-RL is a low noise, ultra-low jitter, wide frequency range CMOS based clock generator specifically designed to power the latest high-speed communications systems. The output of the clock generator is either a high-speed differential CMOS LVPECL or LVDS clock. It is optimized to work over a wide frequency range, from 26.552MHz to 3.125GHz or higher, making it ideal for a wide range of applications.

Application Field

AD9577BCPZ-RL is suitable for various demanding applications in clock generation, such as single frequency synchronization, or broadband frequency generation for multiple telecom-grade applications. It could be used in optical and copper links of Ethernet, Fibre Channel, OC-192, OTU-2, CPRI, and CCAP.

It can also be used as a programmable clocksounder, and a wide range of clock outputs and can be used to synchronize receivers in GSM and CDMA systems. Other application could be BroadR-Reach, PON, Gigabit Ethernet, and SFP module requirements.

Working Principle

The internal architecture of the AD9577BCPZ-RL clock generator makes it easy to generate precision clock signals for a wide range of applications. It has an internal oscillator that drives the programmable clock divider, phase shifter, and frequency synthesizer. The integrated phase locked loop (PLL) provides even better accuracy by providing excellent phase stability. It also provides very low-jitter clock outputs, which is ideal for high-speed serial links.

The internal oscillator is programmed using the external SYNC and CLK inputs. Both voltage and current mode logic can be used to program the oscillator frequencies. The SYNC signal lets the internal oscillator run in ‘program’ or ‘receive’ mode, depending on external commands. The CLK signal is used to control the phase of the PLL, so that the clock generator can be synchronized with another system.

The other major component of the AD9577BCPZ-RL is the programmable divider. This divider is used to divide the internal oscillator frequency down to the desired operating frequency. It features two independent dividers, which can independently divide down to either the same frequency or two separate frequencies. The design also features an output clock buffer, which provides the required low-jitter clock outputs suitable for high-speed serial links.

The AD9577BCPZ-RL also features a programmable phase shifter. This is used to delay the output clock signal to account for the differences in the propagation delays of the system. The amount of delay is adjustable using an external resistor. With this feature, the AD9577BCPZ-RL enables the user to adjust the clock output to the specific application requirements.

The AD9577BCPZ-RL has a wide range of other features that enable it to be tailored to a specific application. It can be programmed to enable different clock outputs (single or multiple), enable the oscillator to run in ‘program’ or ‘receive’ mode, and enable the phase shifter for timing corrections. The combination of these features makes the AD9577BCPZ-RL an ideal choice for applications in clock generation.