ATXMEGA192D3-AU

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1. Describe

Atmel AVR XMEGA is a family of 8/16-bit microcontrollers based on low power consumption, high performance and rich peripherals About AVR Enhanced RISC Architecture. By executing instructions in a single clock cycle, AVR XMEGA devices Achieving CPU throughput approaching one million instructions per second per megahertz (MIPS), allowing the system Designers optimize power consumption and processing speed. The AVR CPU combines a rich instruction set with 32 general-purpose working registers. All 32 registers are directly Connected to the Arithmetic Logic Unit (ALU), allowing access to two separate registers in one instruction, Executed in one clock cycle. The resulting architecture achieves multiple throughput while being more code efficient Faster than traditional single accumulator or CISC-based microcontrollers. XMEGA D3 devices offer the following features: In-system programmable flash memory with read and write capabilities; Internal EEPROM and SRAM; four-channel event system and programmable multi-level interrupt controller, 50 general purpose Purpose I/O lines, 16-bit real-time counter (RTC); five 16-bit timer/counters with compare and PWM channels; three USART; two two-wire serial interfaces (TWI); two serial peripheral interfaces (SPI); one 16-channel, 12-bit ADC with programmable gain; two analog comparators (AC) with windowed mode; programmable watchdog timer and independent Internal oscillator; accurate internal oscillator with PLL and prescaler; and programmable brown-out detection. Provides the Programming and Debug Interface (PDI), a fast, two-pin interface for programming and debugging. AVR XMEGA devices have five software-selectable power saving modes. Idle mode stops the CPU while The SRAM, event system, interrupt controller and all peripherals are allowed to continue to operate. Power-down mode Save SRAM and register contents, but stop oscillator and disable all other functions until next TWI or pin- Change interrupt, or reset. In power saving mode, asynchronous real-time counters continue to run, allowing Application to maintain the timer base while the rest of the device is sleeping. In standby mode, the external crystal The oscillator continues to run while the rest of the device is asleep. This allows fast startup from an external crystal, combined with low power consumption. In Extended Standby mode, the main oscillator and asynchronous timer Keep running. To further reduce power consumption, the peripheral clock for each individual peripheral can be chosen as Stop in active mode and idle sleep mode. Atmel provides a free QTouch library for embedding capacitive touch button, slider and wheel functionality into AVRs microcontroller. These devices are fabricated using Atmel high-density non-volatile memory technology. Program flash can Reprogramming within the system via PDI. The bootloader running in the device can be downloaded using any interface application to flash. The bootloader software in the boot flash section will continue to run, while The application flash section has been updated to provide true read and write operations. By combining an 8/16-bit RISC CPU with In-system, self-programming flash memory, the AVR XMEGA is a powerful family of microcontrollers offering a high degree of flexibility Cost effective solution for many embedded applications. All AVR XMEGA devices support a complete set of program and system development tools, including: CCompilers, macro assemblers, program debuggers/simulators, programmers and evaluation kits.

2. Feature

    1. High-performance, low-power Atmel® AVR® XMEGA® 8/16-bit microcontrollers

    2. Non-volatile program and data memory

        - 32K - 384KBytes in-system self-programming flash memory

        - 4K - 8KBytes Boot Section

        - 1K - 4KBytes EEPROM

        - 4K - 32KBytes Internal SRAM

    3. Peripheral functions

        - Four channel event system

        - Five 16-bit timers/counters

        - Three USARTs with IrDA support for one USART

        - Two two-wire interfaces with dual address matching (I2C and SMBus compatible)

        - Two Serial Peripheral Interfaces (SPI)

        - CRC-16 (CRC-CCITT) and CRC-32 (IEEE®802.3) generators

        - 16-bit real-time counter (RTC) with independent oscillator

        - One sixteen-channel, 12-bit, 300ksps analog-to-digital converter

        - Two analog comparators and current source with window compare function

        - External interrupts on all general purpose I/O pins

        - Programmable watchdog timer with separate on-chip ultra-low power oscillator

        - Atmel QTouch® library support

    4. Special microcontroller functions

        - Power-on reset and programmable brown-out detection

        - Internal and external clock options with PLL and prescaler

        - Programmable multi-level interrupt controller

        - Five sleep modes

        - Programming and debugging interface

    5. I/O and packaging

        - 50 programmable I/O pins

        - 64-pin TQFP

        - 64-pad QFN

    6. Working voltage

        - 1.6 – 3.6V

    7. Working frequency

        - 0 – 12MHz from 1.6V

        - 0 – 32MHz from 2.7V

3. Capacitive Touch Sensing

The Atmel QTouch library provides a simple to use solution to realize touch sensitive interfaces on most Atmel AVR microcontrollers. The patented charge-transfer signal acquisition offers robust sensing and includes fully debounced reporting of touch keys and includes Adjacent Key Suppression™ (AKS™) technology for unambiguous detection of key events. The QTouch library includes support for the QTouch and Atmel QMatrix acquisition methods. Touch sensing can be added to any application by linking the appropriate Atmel QTouch library for the AVR microcontroller. This is done by using a simple set of APIs to define the touch channels and sensors, and then calling the touch sensing API’s to retrieve the channel information and determine the touch sensor states.

4. AVR CPU

    1. 8/16-bit, high-performance Atmel AVR RISC CPU

        - 137 instructions

        - Hardware multiplier

    2. 32x8-bit registers directly connected to the ALU

    3. Stack in RAM

    4. Stack pointer accessible in I/O memory space

    5. Direct addressing of up to 16MB of program memory and 16MB of data memory

    6. True 16/24-bit access to 16/24-bit I/O registers

    7. Efficient support for 8-, 16-, and 32-bit arithmetic

    8. Configuration change protection of system-critical features