BR24S64FVT-WE2

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BR24S64FVT-WE2 is a 64M-bit part of Flash type electrically erasable programmable read-only memory (EEPROM) containing four banks of 16 bits. It is developed and manufactured by Toshiba Semiconductor. The BR24S64FVT-WE2 is a high-performance memory device featuring low-power consumption, low-voltage operations, and fast write program. These characteristics make the BR24S64FVT-WE2 suitable for various memory applications in various devices.

Application Field

The BR24S64FVT-WE2 is ideal for applications that require a high density of non-volatile memory. These applications are mainly in avionic systems, automated control systems, medical systems, and automotive systems. The BR24S64FVT-WE2 is used in non-volatile RAM, looking up tables with data logging, intelligent instrumentation, and information storage and retrieval. Its wide operating range and its memory combination makes it suitable for any stand-alone or multi-master interface

Working Principle

The BR24S64FVT-WE2 has a 64M-bit capacity and its organization is four banks of 16 bits. Each bank contains two pages of 8 bits. The BR24S64FVT-WE2 has an array configuration that provides address decode logic and a column latch, which is used to divide the address space into eight distinct blocks of eight columns. The memory is protected with a write protection circuit that prevents unwanted overwrite of the memory. The device also features a two-level password protection system and data region locking.

When the Start command is fired, the row and column addresses are latched into the appropriate latch registers. Then the row selection mechanism is activated and the selected row is precharged. The read operation is executed by transferring the data stored on the selected row onto the I/O where the data is read by the microcontroller.

The write operations of the BR24S64FVT-WE2 is best divided into two parts, the programming and erase operations. During programming, the data is written to the row and column address that is latched right after the start command. During erase, the microcontroller sets the row and column addresses and initiates the erase cycle that erases the content of each block of 8 columns.

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