CD4018BPWR

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The CD4018BPWR is a popular CMOS IC that has a range of uses from combining digital circuits to its best applications as a dual 4-stage ripple counter and divider. This device can be used in a variety of digital logic applications where it is used for a variety of operations such as; counting, frequency dividing and data manipulation. This IC is used in a variety of digital instruments from a computer’s CPU to digital-to-analog and analog-to-digital converters.

The CD4018BPWR consists of two sections, each containing four interconnected D-type Flip-flop, forming a D-type register. There are two ‘ticks’ or clock inputs CLK 0 and CLK 1, with each pair of Flip-flops being connected to a respective ‘tick’ inputs, one pair being designated as ‘A’ with the other pair being ‘B’. A direct connection between output A3 and input B3 allow the Flip-flops to cascade enabling pulses generated on output ‘A’ (pin 13) of one section to ‘tock’ or shift the data in the other section. The data in each section is ‘shifted’ right on the application of a positive pulse to the appropriate ‘tick’.

Each of the four D-type Flip-flops is a clocked device, which stores data into the flip-flop on the positive edge of the ‘tick’ and then consequently transfer that information to the output. The four D-type Flip-flops synchronize the data with the ‘tick’ and help in the flow of data straight through the IC. This device can be used as a dual 4-stage ripple counter and divider which requires the clock inputs to be connected to a suitable frequency.

The four outputs, A3 to A0, give a decimal output which represent a binary count. The four outputs together form an up/down counting Flip-flop, that can either count up or down depending upon the position of the Clock input or CLK 0 or CLK1. A ‘Tick’ on CLK0 terminal advances the Binary count on COUT whereas if the CLK1 is ‘tocked’ then a ‘walk away’ count is produced enabling the counter to count down. When the output sequence of A3 to A0 is at maximum or 1111 the clock on CLK0 pulse will cause a reset back to 0000, here in this case maximum count resolution of this section is 15. The outputs are fed into the next Flip-flop in a serial manner causing a ‘ripple’ shift and the count resolution of the next section is twice that of the previous one.

The divide-by-N frequency divider is the most widely used application of the CD4018BPWR. In this application, the use of only one ‘tick’ input to the counter is required and it is connected to the output of some other logic block, where the timing of the other block is such that it either directly or indirectly provides the count frequency of the counter. This way, the device also functions as a frequency dividear. The divide-by-N frequency divider application has the advantage of being able to divide the input frequency by a large number and with very accurate timing. This makes it ideal for use in digital clocks, which need to count accurately even when long gaps between pulses occur.

In conclusion, the CD4018BPWR is a versatile IC that can be used in a variety of digital logic applications such as counting, frequency dividing and data manipulation. This device can be used as a dual 4-stage ripple counter and divider and can be used as a divide-by-N frequency divider as well. This device is widely used in various digital instruments from a computer’s CPU to digital-to-analog and analog-to-digital converters.

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