Allicdata Part #: | 296-6721-5-ND |
Manufacturer Part#: |
CDCV850DGG |
Price: | $ 5.11 |
Product Category: | Integrated Circuits (ICs) |
Manufacturer: | Texas Instruments |
Short Description: | IC PLL CLOCK DRVR 2.5V 48-TSSOP |
More Detail: | N/A |
DataSheet: | CDCV850DGG Datasheet/PDF |
Quantity: | 120 |
Lead Free Status / RoHS Status: | Lead free / RoHS Compliant |
Moisture Sensitivity Level (MSL): | 2 (1 Year) |
1 +: | $ 4.64310 |
10 +: | $ 4.19643 |
100 +: | $ 3.47407 |
500 +: | $ 3.02520 |
1000 +: | $ 2.63485 |
Series: | -- |
Packaging: | Tube |
Lead Free Status / RoHS Status: | -- |
Part Status: | Active |
Moisture Sensitivity Level (MSL): | -- |
Type: | PLL Clock Driver |
PLL: | Yes with Bypass |
Input: | LVTTL, SSTL-2 |
Output: | SSTL-2 |
Number of Circuits: | 1 |
Ratio - Input:Output: | 1:11 |
Differential - Input:Output: | Yes/Yes |
Frequency - Max: | 140MHz |
Divider/Multiplier: | No/No |
Voltage - Supply: | 2.3 V ~ 2.7 V |
Operating Temperature: | 0°C ~ 85°C |
Mounting Type: | Surface Mount |
Package / Case: | 48-TFSOP (0.240", 6.10mm Width) |
Supplier Device Package: | 48-TSSOP |
Base Part Number: | CDCV850 |
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The CDCV850DGG is part of the Clock/Timing range of frequency synthesizers, PLLs, clock generators and related ICs available from Texas Instruments. It is a low-jitter, high-performance monolithic PLL-based clock synthesizer. The instrument enables customers to synthesize any desired frequency from a low-speed reference clock, using a range of programmable device parameters. The central feature of this device is its programmable PLL, which has the necessary elements (e.g. charge pump, loop filter, VCO), plus an integrated digital frequency synthesizer (including dividers and a prescaler) block. The output clock format can be either single-ended (LVDS) or differential (LVPECL).
In terms of its application field, the CDCV850DGG offers numerous potential applications. Its ability to precisely generate any frequency from a low-speed reference clock makes it a good choice for networking, communications, and other equipment which require synchronized digital clocks. It is particularly useful in equipment which requires multiple clock domains, since it gives the user greater flexibility in terms of defining the exact output frequency. It is also highly suitable for use in high-performance computing systems and embedded systems.
The working principle of the CDCV850DGG is based on the principles of phase locked loop (PLL) technology. The fundamental elements of PLL technology are the phase detector, low-pass loop filter, voltage controlled oscillator (VCO) and divider. During operation, the phase detector compares the signal from the reference clock with the signal from the VCO, and produces a corrective signal which is filtered and absorbed by the VCO. This in turn adjusts the phase and frequency of the VCO output to match the phase and frequency of the reference clock. The frequency of the VCO output can also be adjusted further by changing the divider ratio. The reference clock frequency and the divider ratio can be programmable, allowing the user to configure the frequency of the output clock to suit the required specifications.
The CDCV850DGG therefore provides customers with a precise, high performance and cost-effective clock synthesizer solution. Its PLL-based design allows the user to adjust the output clock frequency to suit any application requirement, while its integrated digital frequency synthesizer block allows further fine-tuning of the output frequency. The device is able to support both single-ended and differential output formats, making it well suited to a wide range of applications in the network, communications and computing fields.
The specific data is subject to PDF, and the above content is for reference
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