| Allicdata Part #: | DS1013S-10-ND |
| Manufacturer Part#: |
DS1013S-10 |
| Price: | $ 0.00 |
| Product Category: | Integrated Circuits (ICs) |
| Manufacturer: | Maxim Integrated |
| Short Description: | IC DELAY LINE 10NS 16SOIC |
| More Detail: | Delay Line IC Multiple, NonProgrammable 10ns 16-SO... |
| DataSheet: | DS1013S-10 Datasheet/PDF |
| Quantity: | 1000 |
| 1 +: | 0.00000 |
| Series: | -- |
| Packaging: | Tube |
| Part Status: | Obsolete |
| Function: | Multiple, NonProgrammable |
| Delay to 1st Tap: | 10ns |
| Available Total Delays: | 10ns |
| Number of Independent Delays: | 3 |
| Voltage - Supply: | 4.75 V ~ 5.25 V |
| Operating Temperature: | 0°C ~ 70°C |
| Mounting Type: | Surface Mount |
| Package / Case: | 16-SOIC (0.295", 7.50mm Width) |
| Supplier Device Package: | 16-SOIC |
| Base Part Number: | DS1013 |
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A DS1013S-10 delay line from Maxim Integrated is a small, low-cost, 8-bit programmable delay line IC with a zero to 127 x 8 bit delay cell. The device features a fixed programmable interval frequency between zero and 1.2 MHz. The delay line can be programmed with individual registers to each bit cell for delays up to 127 bits. Each cell can also be programmed to provide a delay of up to 4 μs.
The application fields of the delay line range from a variety of timing, phase and clock synchronizing circuits and applications. It can be used in a variety of applications that require precise and repeatable delays, such as clock regeneration, analog waveform reproduction, delay equalization, clock multiplexing and variable delays.
The working principle of the DS1013S-10 delay line is based on the two main components of its design: an 8-bit register array and an 8-bit digital latch. With the 8-bit register array, the programmable delays are implemented in a time-division multiplexing approach. The delay settings are stored in the registers and the settings are written to the latch. As long as the registers remain unchanged, data is read from the latched settings and the delays are set for each bit cell.
The 8-bit digital latch contains a control circuit used to control the delay line functions. By adjusting the latch control inputs, the delay time allocated to each bit cell can be adjusted. There are also input enable and output enable signals which allow data to be read from and written to the delay line while in operation.
The DS1013S-10 delay line is an ideal solution for a wide variety of timing, phase and clock synchronization related applications. Its 8-bit register array and 8-bit digital latch provide an ideal platform for creating precise, repeatable digital delays. Its low cost and small size make it a great choice for use in many different types of applications.
The specific data is subject to PDF, and the above content is for reference
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DS1013S-10 Datasheet/PDF