DS90UB928QSQ/NOPB Allicdata Electronics
Allicdata Part #:

296-42652-2-ND

Manufacturer Part#:

DS90UB928QSQ/NOPB

Price: $ 5.26
Product Category:

Integrated Circuits (ICs)

Manufacturer: Texas Instruments
Short Description: IC DESERIALIZER LVDS 48WQFN
More Detail: 2.975Gbps Deserializer 1 Input 13 Output 48-WQFN (...
DataSheet: DS90UB928QSQ/NOPB datasheetDS90UB928QSQ/NOPB Datasheet/PDF
Quantity: 190
1 +: $ 5.26000
10 +: $ 5.10220
100 +: $ 4.99700
1000 +: $ 4.89180
10000 +: $ 4.73400
Stock 190Can Ship Immediately
$ 5.26
Specifications
Series: Automotive, AEC-Q100
Packaging: Tape & Reel (TR) 
Part Status: Active
Function: Deserializer
Data Rate: 2.975Gbps
Input Type: FPD-Link III, LVDS
Output Type: LVDS
Number of Inputs: 1
Number of Outputs: 13
Voltage - Supply: 3 V ~ 3.6 V
Operating Temperature: -40°C ~ 105°C (TA)
Mounting Type: Surface Mount
Package / Case: 48-WFQFN Exposed Pad
Supplier Device Package: 48-WQFN (7x7)
Base Part Number: DS90UB928
Description

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DS90UB928QSQ/NOPB Application Field and Working Principle

The DS90UB928QSQ/NOPB Serializer/Deserializer (serdes) is a device designed to interface between a high-speed serial bus and low-speed differential signaling environments. The serdes is designed specifically for applications requiring long, low-power, and low-cost data links. By providing high-speed digital signal isolation, the serdes reduces system complexity, cost, and power consumption.

The DS90UB928QSQ/NOPB serdes is an 8-bit wide, low-power, low-cost, differential signaling data link interface, designed to transmit and receive data between multiple applications such as storage, point-to-point interconnects and sensors. With a data rate of up to 400 Mbps, the serdes supports physical layer protocols such as Serial Attached SCSI, USB 3.0, SAS, PCIe, and Serial Digital Interface (SDI).

Design Flexibility and Low Power Consumption

The architecture of the serdes is based on a fully digital design, which is optimized for low-cost and low-power operations. The design also provides flexibility, allowing users to define the protocol and choose the appropriate channel rate. The device contains two independent serializer and deserializer channels, each of which supports a data rate of 400 Mbps. The serializer and deserializer channels can be programmed independently to interface with various digital interface standards.

The DS90UB928QSQ/NOPB serdes also has a unique low-power-mode operation. When the device is not in use, the power supply can be reduced to 3.3V, significantly reducing power consumption. By dynamically controlling the power supply of the serializer and deserializer channels, the total power consumption can be reduced to less than 250 mW.

Features

  • Supports 8-bit wide data interface
  • Maximum data rate of 400 Mbps
  • Supports low-voltage differential signaling (LVDS)
  • Supports data protocols such as SATA, SAS, PCIe and SDI
  • Integrated 3.3V and 1.8V power supply
  • Selectable 0.Con to 8.3ns service time
  • Integrated equalization and phase correction
  • Constant input slew rate
  • On-chip equalization

Application Field

The DS90UB928QSQ/NOPB serdes is used for a wide range of applications, including point-to-point interconnects, storage, and automotive infotainment systems. Its high-speed and low-power features make it an ideal solution for designs requiring low-cost, low-power environments. The device can also be used in data links requiring serial links, but with a different protocol (e.g., PCIe).

The serdes is also used in other fields, such as mobile computing. With its low-power consumption and high-speed interface, the device enables mobile computing systems to transmit and receive data at higher speeds and lower power than before.

Working Principle

The DS90UB928QSQ/NOPB serdes is based on an 8-bit low-voltage differential signaling (LVDS) interface, which enables high-speed data transmission and reception. The device consists of two independent channels—a transmitting channel and a receiving channel. The transmit channel converts parallel digital data into serial data, while the receive channel converts serial data into parallel digital data. The two channels work together to enable a bi-directional data link with low power consumption and low latency.

The device contains a programmable equalizer and phase correction circuit, which allows for a constant input slew rate. This ensures that the received data is accurately detected by compensating for any losses due to signal degradation. Additionally, the serdes provides on-chip equalization to improve signal integrity.

To ensure correct data transfer, the DS90UB928QSQ/NOPB serdes also features an FIFO (First-In-First-Out) memory. Data received by the device is stored in the FIFO and then read out in order as needed. The FIFO helps to reduce latency between data read and write operations, allowing for higher transfer speeds and improved system performance.

Conclusion

The DS90UB928QSQ/NOPB serdes is an 8-bit wide, low-cost, low-power, differential signaling data-link interface, designed to transmit and receive data between multiple applications such as storage, point-to-point interconnects and sensors. The device provides high-speed digital signal isolation and reduces system complexity, cost, and power consumption. With features such as programmable equalization, phase correction, and on-chip equalization, the serdes is an ideal solution for applications requiring long, low-power, and low-cost data links.

The specific data is subject to PDF, and the above content is for reference

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