Allicdata Part #: | 497-1365-5-ND |
Manufacturer Part#: |
HCF4060BEY |
Price: | $ 0.00 |
Product Category: | Integrated Circuits (ICs) |
Manufacturer: | STMicroelectronics |
Short Description: | IC COUNTER/DIV/OSC 14ST 16-DIP |
More Detail: | Counter IC Binary Counter 1 Element 14 Bit Negativ... |
DataSheet: | HCF4060BEY Datasheet/PDF |
Quantity: | 1000 |
Timing: | -- |
Base Part Number: | 4060 |
Supplier Device Package: | 16-DIP |
Package / Case: | 16-DIP (0.300", 7.62mm) |
Mounting Type: | Through Hole |
Operating Temperature: | -55°C ~ 125°C |
Voltage - Supply: | 3V ~ 20V |
Trigger Type: | Negative Edge |
Count Rate: | 24MHz |
Series: | 4000B |
Reset: | Asynchronous |
Number of Bits per Element: | 14 |
Number of Elements: | 1 |
Direction: | Up |
Logic Type: | Binary Counter |
Part Status: | Obsolete |
Packaging: | Tube |
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HCF4060BEY is a CMOS high-speed programmable divider/timer/counter which is suitable for applications like clock/frequency division, pulse width modulation, digital potentiometer, address generation, strobe control, periodic interrupt generation, and digital motor control. This device contains 14 separate stages and provides the temperature stability, low power consumption and fast operating speed required in digital systems. It is easy to configure the required operating stages of the HCF4060BEY, making it an ideal solution for high-speed applications.The HCF4060BEY consists of four programmable divide-by-N/phase-lock loop (PLL) counter/dividers, a15th stage ÷4 network, an oscillator, four output drivers, and a data input/output port. Each divide-by-N/PLL counter/divider consists of two stages, each containing a presetable 4-bit binary counter which can be programmed with values from 2 to 15 and four flip-flops. The 15th stage is a ÷4 network consisting of two 2-bit binary counter/dividers. The output buffer consisting of two drivers can supply output current of up to 25 mA. The HCF4060BEY has a wide operating temperature range from -55°C to 125°C.
The HCF4060BEY application field includes applications such as pulse width modulation, digital potentiometer, address generation, strobe control, periodic interrupt generation, and digital motor control. In addition, the HCF4060BEY can be used for clock/frequency division, featuring a dividing rate from 2 to 32767 in order to adapt to a variety of clock frequencies. The device can be used for pulse width modulation, providing pulse widths from 16uS to 180ms. In addition, the device is used in applications where a stable clock frequency and phase must be maintained, such as in phase-lock loops.The HCF4060BEY has two working modes. The first is static mode and is used when the device is operated in single-shot operation. In this mode, the device is triggered by an external signal and then performs a single operation. The second is dynamic mode, in which the device is connected to a continuously updating clock source and performs operations as long as the clock source remains active. The device is powered by a single +5V supply. The oscillator is comprised of a capacitor and a resistor and is cascaded with up to four divide-by-N/PLL counter/dividers. The device provides three different kinds of outputs including a constant logic-level output, an active-high logic-level output and an active-low logic-level output, depending on the preset stage number. Each of the four output drivers have TTL compatible outputs and can source up to 25mA. The device has a low standby current consumption of less than 1uA which makes it an ideal choice for battery-operated applications.
In summary, the HCF4060BEY is a CMOS high-speed programmable divider/timer/counter. It is suitable for a wide range of applications including pulse width modulation, digital potentiometer, address generation, strobe control, periodic interrupt generation and digital motor control. The device is powered by a single +5V supply and provides three different types of output. It has low power consumption and fast operating speed and is capable of dividing from 2 to 32767. Therefore, it is an ideal choice for a variety of applications where a stable clock frequency and phase must be maintained.
The specific data is subject to PDF, and the above content is for reference
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