| Allicdata Part #: | IDT72V36106L10PF8-ND |
| Manufacturer Part#: |
IDT72V36106L10PF8 |
| Price: | $ 0.00 |
| Product Category: | Integrated Circuits (ICs) |
| Manufacturer: | IDT, Integrated Device Technology Inc |
| Short Description: | IC FIFO 131KX36 10NS 128QFP |
| More Detail: | N/A |
| DataSheet: |  IDT72V36106L10PF8 Datasheet/PDF |
| Quantity: | 1000 |
| 1 +: | 0.00000 |
Specifications
| Bus Directional: | Triple-Bus |
| Base Part Number: | 72V36106 |
| Supplier Device Package: | 128-TQFP (14x20) |
| Package / Case: | 128-LQFP |
| Mounting Type: | Surface Mount |
| Operating Temperature: | 0°C ~ 70°C |
| FWFT Support: | Yes |
| Retransmit Capability: | Yes |
| Programmable Flags Support: | Yes |
| Expansion Type: | Depth, Width |
| Series: | 72V |
| Current - Supply (Max): | 400mA |
| Voltage - Supply: | 3.15V ~ 3.45V |
| Access Time: | 6.5ns |
| Data Rate: | 100MHz |
| Function: | Synchronous |
| Memory Size: | 4.5M (64K x 36 x 2) |
| Part Status: | Obsolete |
| Packaging: | Tape & Reel (TR) |
Description
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The FIFOs Memory Logic-IDT72V36106L10PF8The FIFOs Memory Logic, such as IDT72V36106L10PF8, is resetable memory logic that resolves bus contention and reduces the signal pin count on backplanes. This model has the additional benefit of being stud-mounted which provides an easy solution for cooling without the hazard of conducting electricity. The FIFOs supports high-speed, point-to-point differential signaling applications. It works asynchronously, it has its own independent clock, plus it has Quad Active-High/ Active-Low/ Tri-Stateable Outputs.
The IDT72V36106L10PF8 is a parameterizable, 8-bit by 10-bit FIFOs Dual-Port RAM. It contains unique power control circuitry to reduce power consumption during periods of low usage. This model has the benefit of low power operation and high-speed performance so it is suitable for a variety of applications such as point-to-point signaling systems, digital video, digital audio, data communications, or any embedded system requiring high performance with low power. Each FIFO supports an independent write and a read port. The write and read ports are designed to meet different timing needs to ensure flexibility when interfacing with external systems. It can be used with an asynchronous duty cycle (off-chip write) or asynchronous dual-clock duty cycle (on-chip write).
The FIFOs supports high-speed, 8-bit data transfers, and 10-bit addresses for flexible address decoding. The FIFOs can operate at speeds up to 400 MHz. It has an on-chip write counter that keeps track of the write address so when no write data is present, the read port operates at its full frequency.
The FIFOs has multiple power modes that allow the device to power down when not in use. There are three power modes, Active, Power down and Reset. The Active mode is the normal operating mode and is enabled if an active clock is present. The Power down mode is enabled when the write port isn’t in use and is used to reduce power consumption. The Reset mode is enabled when the write port is not in use and will reset the internal logic.
The IDT72V36106L10PF8 is widely used in embedded systems, data communication, point-to-point signaling systems, digital audio, and digital video. Asynchronous read and write operations allow applications to have flexibility when interfacing with external systems. It can also be used for applications that require high performance with low power operation. Furthermore, its power control circuitry can reduce power consumption during periods of low usage, making it an ideal choice for applications that require low power consumption.
The specific data is subject to PDF, and the above content is for reference
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