LPC1112FDH28/102:5

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The LPC1112FDH28/102 is a high-efficiency, low-power controller manufactured by NXP Semiconductors. It is based on the 32-bit ARM Cortex-M0 architecture and is designed for embedded applications requiring high integration and cost-effective performance. The flexible peripheral set incorporates an internal Memory Protection Unit (MPU) for secured code execution and a security feature known as the Secure Partition Manager (SPM).

Part of the ARM Cortex-M family of processors, the LPC1112FDH28/102 can be used in applications such as consumer, industrial and automotive electronics requiring low-power operations, a rich set of peripherals and secured code execution. The device combines a high level of integration with low power consumption and fast real-time responses.

The LPC1112FDH28/102 is the latest LPC1112 product series and provides the highest level of integration yet. It comes in 3 packages: LQFP100 (100-pin fine pitch quad-flat package), TQFP100 (100-pin thin-quad flat package) and VFQFPN100 (100-pin very-fine pitch quad-flat package). This device implements a planar power supply system and features multiple low-power modes such as partial power-down and full system power-down.

The LPC1112FDH28/102 is designed for general-purpose embedded applications in consumer, industrial, and automotive markets. It features a Cortex-M0 processor core with code-efficient instruction set, fast interrupt handling and less power consumption. The two-stage pipeline architecture and Harvard bus architecture give the LPC1112FDH28/102 superior instruction execution rate and low latency. The device also incorporates on-chip Flash memory as well as an array of analog and digital peripherals.

The embedded Flash memory of the LPC1112FDH28/102 consists of up to 64KB of ROM, 16KB of SRAM and up to 8KB of ROM-based backup memory. The peripheral set includes up to 64KB of ROM, up to 8KB of SRAM, up to 16KB of ROM-based backup memory and up to six general-purpose I/O ports. The device also includes one 10-bit 8-channel ADC, one 10-bit ADC, one 10-bit DAC and one 10-bit PWM generator.

The LPC1112FDH28/102 also features two Power-Saving Modes for operating frequency and core voltage reduction when operating system tasks are inactive. The device features an internal oscillator that can be set for 36MHz maximum clock rate for high-speed operations and a 14.4MHz system clock for low-speed applications. It also offers two 32bit timers, one configurable 32-bit watchdog timer, one 32-bit Interrupt ReQuest (IRQ) and four software-driven Interrupts (SWI).

The LPC1112FDH28/102 includes data security features, such as the Secure Partition Manager (SPM), which can be used to prevent unauthorized access to Flash memory and/or RAM. The device also implements a Memory Protection Unit (MPU) for secure program execution, with two regions for each of the two levels of privilege.

In summary, the LPC1112FDH28/102 is an integrated solution for industrial, automotive, and consumer markets, offering high integration with low power consumption, fast real-time responses, built-in data security measures, and a broad set of analog and digital peripherals. Its compatible with the ARM Cortex-M0 architecture, employs a planar power supply system, and offers multiple low-power modes. It is suitable for embedded applications requiring secure program execution and a range of low power, high performance peripherals.

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