MC100EP33DTR2G

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The MC100EP33DTR2G is a high performance, low voltage ECL differential 3-2 dividers/counters. The device can divide an input frequency from 2kHz to 125 MHz by integer values from 3 to256 before it is presented as the output Frequency. This device is commonly used in Synchronous Ethernet,Fibre Channel,PON,SONET and Ethernet applications which require very tight output frequency tolerance and low additive jitter. The device features a differential mode input and differential outputs, both AC coupled. It’s designed to divide the input signal without degrading the noise and SNR of the input signal.

Application Field

MC100EP33DTR2G applications benefit from its low additive jitter, tight output frequency tolerance and low voltage supply. It is suitable for uses in Ethernet, Fibre Channel, PON, and SONET applications where fast and accurate output frequencies are essential. Sample applications include logic dividers and dividers for cryptographic applications or digital video where precise frequency control of the output signal is required.

Working Principle

The MC100EP33DTR2G works by counting the number of rising or falling edges of the input signal. It keeps track of the number of transitions which occur over time and then outputs a signal at one-thirdor one-half of the input signal\'s frequency. The divider has differential input and output ports, so the signal is double phase-cosited, which reduces errors due to interference. The counters are synchronously reset and are designed to wide dynamic input frequency range. The devices feature a differential output with a 50 ohm amplifier and a programmable output level. The counters are designed using the ECL logic family, which allows them to operate at very low power levels.

The MC100EP33DTR2G is a very digital device. It consists of two counters, a two-phase digital clock generator and a two-phase regenerator. The first counter outputs a pulse which triggers the second counter and resets the first one. The output of this second counter is the divided frequency signal. Both counters have synchronous reset inputs, which helps reduce errors due to timing variations on arrival of the signal. The second counter is used to detect the number of rising and falling edges of the input signal and generate the appropriate output frequencies. The two-phase clock generator also serves as a reference for synchronization.

The two-phase regenerator filters out jitter from the input signal and helps reduce additive jitter in the output signal. The output signal is then fed into a 50 ohm differential amplifier, which provides the required low output voltage levels. The output port is programmable, which enables the user to select the appropriate output level for their application.

Over temperature, undervoltage and overvoltage protection mechanisms are also included in the device. The device is designed to run on single +3.3V supply, which keeps power consumption to a minimum. The device is also designed to withstand static discharge and electrostatic discharge without damage.

In conclusion, the MC100EP33DTR2G is a high performance differential 3-2 counter/divider which can process input frequencies from 2kHz to 125MHz before presenting them as the output frequency. The device is perfect for uses in Ethernets, Fibre Channel, FON, and SONET applications. It can detect the rising and falling edges of the input signal and generate the appropriate output frequencies. The device is also designed to have low additive jitter and tight output frequency tolerance.

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