![MC74LCX373MEL Allicdata Electronics](https://files.allicdata.com/upload/common/default.jpg)
Allicdata Part #: | MC74LCX373MEL-ND |
Manufacturer Part#: |
MC74LCX373MEL |
Price: | $ 0.00 |
Product Category: | Integrated Circuits (ICs) |
Manufacturer: | ON Semiconductor |
Short Description: | IC LATCH TRANSP OCT LV 20-SOEIAJ |
More Detail: | D-Type Transparent Latch 1 Channel 8:8 IC Tri-Stat... |
DataSheet: | ![]() |
Quantity: | 1000 |
1 +: | 0.00000 |
Series: | 74LCX |
Packaging: | Tape & Reel (TR) |
Part Status: | Obsolete |
Logic Type: | D-Type Transparent Latch |
Circuit: | 8:8 |
Output Type: | Tri-State |
Voltage - Supply: | 2 V ~ 3.6 V |
Independent Circuits: | 1 |
Delay Time - Propagation: | 1.5ns |
Current - Output High, Low: | 24mA, 24mA |
Operating Temperature: | -40°C ~ 85°C |
Mounting Type: | Surface Mount |
Package / Case: | 20-SOIC (0.209", 5.30mm Width) |
Supplier Device Package: | SOEIAJ-20 |
Base Part Number: | 74LCX373 |
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The MC74LCX373MEL is a latchable octal transparent latch with active low output enable and it belongs to the Logic - Latches classification. It provides eight bits of transparent latching with a separate output enable (OE) input. The latch state is maintained when OE is low and the outputs assume the predetermined logic state when OE is high. It features an input buffer which improves switching speeds. Its operating voltage range is from 1.65V to 3.6V and it operates with a standard TTL-compatible input voltage of 3.3V. Its input and output buffers feature high impedance on power down and the latch enables feature low power-down current and Schmitt trigger inputs for noise immunity.
The MC74LCX373MEL has a wide range of applications such as for buffering of data busses in order to drive heavier loads, as tap latches in storage devices, as data sampling on short clock intervals, as an octal latch in FIFO (first in first out) buffers and as an intermediate register in many applications. Furthermore, it is ideal for high speed logic systems and manufactured with high noise and radiation immunity.
The working principle of the MC74LCX373MEL latch involves eight transparent latch enables whose individual outputs assume the logic state of their respective inputs when the latch enable is low. Each latch enable has a separate output enable (OE) input. If OE is low, the latch enable maintains its current output state. If OE is high, the latch enable outputs assume a predetermined logic state. Buffered inputs improve the noise immunity of the latch and the output buffers feature high impedance on power down.
The MC74LCX373MEL latch is capable of receiving and storing data quickly and efficiently by latches which are transparent in nature. When the OE input is low, the outputs follow their inputs, allowing the device to be used in applications such as sampling data for transmission or for buffer addressing. In applications such as FIFO buffers, the MC74LCX373MEL acts as an intermediate register and additionally keeps data until the next step in the process is ready to receive it.
The key features of this device include low power consumption, low power-down current and high noise and radiation immunity. The device also features Schmitt trigger inputs and improved switching speeds. The package of choice for this device is TSSOP (Thermal-resistant Low Profile, Low Profile Package). The MC74LCX373MEL is a versatile device and it is suitable for a wide range of applications such as data storage, buffering of data buses, and data sampling.
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