MSP430FR5968IRGZR

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1. Describe

The MSP430™ Ultra Low Power (ULP) FRAM platform combines a unique embedded FRAM with an overall ultra low power system architecture, enabling innovators to increase performance with a lower energy budget. FRAM technology combines the speed, flexibility, and endurance of SRAM with the stability and reliability of flash memory, all at a fraction of the cost. The MSP430FR5968IRGZR ULP FRAM portfolio includes a range of devices featuring FRAM, ULP 16-bit MSP430FR5968IRGZR CPUs, and smart peripherals for a variety of applications. The ULP architecture showcases seven low-power modes optimized to extend battery life in high-energy applications.

2. Feature

    1. Embedded Microcontrollers

        – 16-bit RISC architecture with up to 16-MHz clock

        – Wide supply voltage range down to 3.6 V to 1.8 V

    2. Optimized ultra-low power mode

        – Active mode: approximately 100 µA/MHz

        – Standby (LPM3 with VLO): 0.4 µA (typ)

        – Real Time Clock (LPM3.5): 0.25 µA (typ)(1)

        – Shutdown (LPM4.5): 0.02 µA (typ)

    3. Ultra-low-power Ferroelectric RAM (FRAM)

        – Up to 64KB of non-volatile memory

        – Ultra low power write

        – Fast writes of 125 ns per word (64KB in 4 ms)

        – Unified Memory = Program + Data + Storage a single space

        – 1015 write cycle endurance

        – Radiation resistant and non-magnetic

    4. Smart digital peripherals

        – 32-bit hardware multiplier (MPY)

        – 3-channel internal DMA

        – Real Time Clock (RTC) with calendar and Alarm function

        – Five 16-bit timers, up to seven Capture/compare each register

        – 16-bit Cyclic Redundancy Checker (CRC)

    5. High performance simulation

        – 16-channel analog comparator

        – 12-bit analog-to-digital converter (ADC) With internal reference and sample hold and up to 16 external input channels

    6. Multi-function input/output ports

        – All pins support capacitive touch function No external components required

        – Accessible bits, bytes and words (in pairs)

        – Edge-selectable LPM wakeup on all ports

        – Programmable pull-ups and pull-downs on all ports

    7. Code security and encryption

        – 128-bit or 256-bit AES security encryption and decryption coprocessor

        – Random number seed for random numbers generative algorithm

    8. Enhanced serial communications

        – eUSCI_A0 and eUSCI_A1 support

        – UART with automatic baud rate detection

        – IrDA encoding and decoding

        – SPI

        – eUSCI_B0 support

        – I2C Multi-Slave Addressing

        – SPI

        – Hardware UART and I2C Bootloader (BSL)

    9. Flexible clock system

        – Features 10 selectable fixed frequency DCOs Frequency of Factory Adjustment

        – Low power low frequency internal clock Source (VLO)

        – 32kHz crystal (LFXT)

        – High Frequency Crystal (HFXT)

  10. Development tools and software

        – Free professional development environment Powered by EnergyTrace++™ Technology

        – Development Kit (MSP-TS430RGZ48C)

  11. family member

        – Device comparison summarizes the available Device Variants and Package Types

3. Application

    1. Metering

    2. Energy harvesting sensor nodes

    3. Wearable Electronics

    4. Sensor management

    5. data record

4. CPU

The MSP430 CPU has a 16-bit RISC architecture that is highly transparent to the application. Except for program flow instructions, all operations are performed as register operations in the seven addressing modes for the source operand and the four addressing modes for the destination operand. The CPU integrates 16 registers to shorten the instruction execution time. The execution time for register-to-register operations is one cycle of the CPU clock. Four of these registers, R0 through R3, are dedicated to the program counter, stack pointer, status register, and constant generator, respectively. The rest of the registers are general purpose registers. Peripherals are connected to the CPU using data, address and control buses and can be processed using all instructions. The instruction set consists of the original 51 instructions with three formats and seven address modes, as well as additional instructions for extending the address range. Each instruction can operate on word and byte data.

5. Operating Modes

The MSP430FR5968IRGZR MCUs have one active mode and seven software-selectable low-power modes of operation . An interrupt event can wake up the device from a low-power mode (LPM0 to LPM4), service the request, and restore back to the low-po wer mode on return from the interrupt program. Low-power modes LPM3.5 and LPM4.5 disable the core supply to minimize power consumption.