NLVHCT373ADWR2G

Series:	--
Part Status:	Not For New Designs
Logic Type:	D-Type Transparent Latch
Circuit:	8:8
Output Type:	Tri-State, Non-Inverted
Voltage - Supply:	4.5 V ~ 5.5 V
Independent Circuits:	1
Delay Time - Propagation:	28ns
Current - Output High, Low:	6mA, 6mA
Operating Temperature:	-55°C ~ 150°C
Mounting Type:	Surface Mount
Package / Case:	20-SOIC (0.295", 7.50mm Width)
Supplier Device Package:	20-SOIC

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IntroductionLogic - Latches are widely used in embedded systems and other electronic applications. NLVHCT373ADWR2G is a type of logic latch which is widely used for applications that involve the multiplexing of digital signals. It is a triple 3:32 wide data register that can register up to three separate data inputs from three separate sources. It has a variety of applications, from single board to multiple board applications.Application FieldNLVHCT373ADWR2G is typically used for multiplexing data from three sources: two Dout ports and one Auxiliary Dout port. The triple latch data register receives the data from a three-wire interface; the first one is the external clock (CLK) that clocks in all inputs. The second one is the data input (DI) that provides the input data while the third is the inverted data out (DO) that can retrieve the stored data at any time. The NLVHCT373ADWR2G is suitable for use in motor control applications such as DRAM and Pulse Width Modulation (PWM) applications. It can also be used in clock synchronous applications that involve data manipulation with limited memory resources. In addition, it is an ideal choice for multiplexing applications such as shift registers and bus multiplexers. Working PrincipleThe NLVHCT373ADWR2G is a three-stage latch data register. The internal structure is made up of three stages: first, a synchronous latch that latches the data and enables the clocking in of the data; second, a Dout register that stores the latched data; third, an Auxiliary Dout register that stores the latched data after a delayed period of time.When CLK is high, data are latched and stored into the latch. The data that is stored on the latch then passes through a delay register and then is stored in the Auxillary Dout register. When CLK is low, the data is released from the Auxillary Dout register and the input data is discarded.The data can be retrieved from the Dout port and the Auxiliary Dout port simultaneously depending on the configuration of the device. When the Dout and Auxiliary Dout ports are open, the data is released from both ports. When the Dout and Auxiliary Dout ports are connected, the Auxiliary Dout port serves as the output, bypassing the delay register and providing data from the latch straight to the Auxiliary Dout port. ConclusionNLVHCT373ADWR2G is an ideal device for applications that need to multiplex digital signals. It is suitable for applications such as motor control, synchronous data manipulation, shift registers and bus multiplexers. The device can be used to latch and store data in three stages and can then be retrieved through two ports. It also allows bypassing of the delay register, allowing instant access of the data stored in the latch.

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