PGA280AIPWR Integrated Circuits (ICs)

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1. Description

The PGA280AIPWR is a high-precision instrumentation amplifier with digitally-controllable gain and signal integrity test capability. This device offers low offset voltage, near-zero offset and gain drift, excellent linearity, and nearly no 1/f noise with superior common-mode and supply rejection to support highresolution precision measurement. The 36-V supply capability and wide, high-impedance input range comply with requirements for universal signal measurement. Special circuitry prevents inrush currents from multiplexer (MUX) switching. In addition, the input switch matrix enables easy reconfiguration and system-level diagnostics—overload conditions are indicated. The configurable general-purpose input/output (GPIO) offers several control and communication features. The SPI can be expanded to communicate with more devices, supporting isolation with only four ISO couplers . The PGA280 is available in a TSSOP24 package and is specified from –40°C to +105°C.

2. Features

    1. Wide input range: ±15.5 V at ±18-V supply

    2. Binary gain steps: 128V/V to 1/8 V/V

    3. Additional scaling factor: 1 V/V and 1⅜ V/V

    4. Low offset voltage: 3 μV at G = 128

    5. Near-zero long-term drift of offset voltage

    6. Near-zero gain drift: 0.5 ppm/°C

    7. Excellent linearity: 1.5 ppm

    8. Excellent CMRR: 140 dB

    9. High input impedance

  10. Very low 1/f noise

  11. Differential signal output

  12. Overload detection

  13. Input configuration switch matrix

  14. Wire break test current

  15. Expandable SPI™ with checksum

  16. General-purpose I/O port

  17. TSSOP-24 package

3. Applications

    1. Analog input module

    2. Data acquisition (DAQ)

    3. Aircraft engine control

    4. Battery test

4. Pin configuration

5. Pin Description

6. Function description

Both high-impedance input amplifiers are symmetrical, and have low noise and excellent dc precision. These amplifiers are connected to a resistor network and provide a gain range from 128 V/V down to an attenuation of ⅛. The PGA280 architecture rejects common-mode offsets and noise over a wide bandwidth. The PGA280 features additional current buffers placed in front of the precision amplifier that can be activated on demand. When activated, these additional current buffers avoid problems that result from input current during dynamic overloads, such as the fast signal transient that follows the channel switching from a multiplexer. Without the use of the additional current buffers, the fast signal transient would overload the precision amplifiers and high bias currents could flow into the protection clamp until the amplifiers recover from the overload. This momentary current can influence the signal source or passive filters in front of the multiplexer and generate long settling tails. Activating this current buffer avoids such an overload current pulse. The buffer disconnects automatically after an adjustable time. For continuous signal measurement, the additional current buffers are not used. The switches in the input provide signal diagnostic capability and offer an auxiliary input channel. Both channels can be switched to diagnose or test conditions, such as a ground-referred, single-ended voltage measurement for either input. In this mode , each of the signal inputs can be observed to analyze common-mode offsets and noise. The primary input channel [INP1 and INN1] provides switches and current sources for a wire break test. Any switch can short both inputs, and can also discharge a filter capacitor after a wire break test, for example. The signal inputs are diode-clamped to the supply rails. External resistors can be placed in series to the inputs to provide overvoltage protection. Limit current into the input pins to ≤ 10 mA. The output stage offers a fully-differential signal around the output reference pin, VOCM. The VOCM pin is a high-impedance input and expects an external voltage, typically close to midsupply. The 3-V or 5-V supply of the converter or amplifier, following the PGA280 outputs, is normally connected to VSOP and VSON; this configuration shares a common supply voltage and protects the circuit from overloads. The fully-differential signal avoids coupling of noise and errors from the supply and ground, and allows large signal swing without the risk of nonlinearities that arise when driving near the supply rails. The PGA280 signal path has several test points for critical overload conditions. The input amplifiers detect signal overvoltage and overload as a result of high gain. The output stage also detects clipping. These events are filtered with adjustable suppression delays and then stored for readout. A GPIO pin can be dedicated for external indication either as an interrupt or in a monitor mode. A serial peripheral interface (SPI) controls the gain setting and switches, as well as the operation modes and the GPIO port pins. The SPI allows read and write access to the internal registers. These registers contain conditions, flags, and settings, as described in the SPI and Register Description section. They represent the gain setting for the Input stage binary attenuation from 128V/V to ⅛ V/V, output stage gain of 1V/V and 1.375 V/V (1⅜). Input MUXs and switches and input buffers are also controlled by registers. Internal error conditions are stored and can be masked to activate external pins in the GPIO port. This GPIO port can be individually configured as input or output or special functions. In special function mode, the port indicates error conditions, generates the CS signal, controls the external MUX, and connects to the buffer control and oscillator. Port pins can act as CS for external SPI devices. This mode connects other SPI devices, such as analog-to-digital (A/D) converters, to the main quad SPI. This feature is especially required when using galvanically isolated SPI communication. An optional checksum byte further improves communication integrity.