SC26C92C1N,602

Due to market price fluctuations,if you need to purchase or consult the price.You can contact us or emial to us:   sales@allicdata.com

Full model: SC26C92C1N

Manufacturer: NXP Semiconductors

Device type: Dual-channel UART transceiver

Package: SOIC-28 (surface mount)

Operating voltage: 3V ~ 5.5V

Operating temperature: -40°C ~ +85°C (industrial grade)

Communication standard: RS-232/RS-485/RS-422 compatible

Data transmission rate: 1Mbps (maximum)

ESD protection: ±15kV (HBM model)

Receiver input impedance: ≥5kΩ

Quiescent current: 1μA (sleep mode)

Driving capability: ±8mA (RS-485 driving current)

Transmission delay: 100ns (typical)

DESCRIPTION

The SC26C92 is a pin and function replacement for the SCC2692 and SCN2681 with added features and deeper FIFOs. Its configuration on power up is that of the 2692. Its differences from the 2692 are: 8 character receiver, 8 character transmit FIFOs, watch dog timer for each receiver, mode register 0 is added, extended baud rate and overall faster speeds, programmable receiver and transmitter interrupts. The Philips Semiconductors SC26C92 Dual Universal Asynchronous Receiver/Transmitter (DUART) is a single-chip CMOS-LSI communications device that provides two full-duplex asynchronous receiver/transmitter channels in a single package. It interfaces directly with microprocessors and may be used in a polled or interrupt driven system and provides modem and DMA interface. The operating mode and data format of each channel can be programmed independently. Additionally, each receiver and transmitter can select its operating speed as one of 27 fixed baud rates, a 16X clock derived from a programmable counter/timer, or an external 1X or 16X clock. The baud rate generator and counter/timer can operate directly from a crystal or from external clock inputs. The ability to independently program the operating speed of the receiver and transmitter make the DUART particularly attractive for dual-speed channel applications such as clustered terminal systems. Each receiver and transmitter is buffered by eight character FIFOs to minimize the potential of receiver overrun, transmitter underrun and to reduce interrupt overhead in interrupt driven systems. In addition, a flow control capability is provided via RTS/CTS signaling to disable a remote transmitter when the receiver buffer is full. Also provided on the SC26C92 are a multipurpose 7-bit input port and a multipurpose 8-bit output port. These can be used as general purpose I/O ports or can be assigned specific functions (such as clock inputs or status/interrupt outputs) under program control.

FEATURES

   1. Dual full-duplex independent asynchronous receiver/transmitters

   2. 8 character FIFOs for each receiver and transmitter

   3. Programmable data format

       – 5 to 8 data bits plus parity

       – Odd, even, no parity or force parity

       – 1, 1.5 or 2 stop bits programmable in 1/16-bit increments

   4. 16-bit programmable Counter/Timer

   5. Programmable baud rate for each receiver and transmitter selectable from:

       – 27 fixed rates: 50 to 230.4k baud

       – Other baud rates to 230.4k baud at 16X

       – Programmable user-defined rates derived from a programmable counter/timer

       – External 1X or 16X clock

   6. Parity, framing, and overrun error detection

   7. False start bit detection

   8. Line break detection and generation

   9. Programmable channel mode

       – Normal (full-duplex)

       – Automatic echo

       – Local loopback

       – Remote loopback

       – Multidrop mode (also called ‘wake-up’ or ‘9-bit’)

 10. Multi-function 7-bit input port

       – Can serve as clock, modem, or control inputs

       – Change of state detection on four inputs

       – Inputs have typically >100k pull-up resistors

 11. Multi-function 8-bit output port

       – Individual bit set/reset capability

       – Outputs can be programmed to be status/interrupt signals

       – FIFO states for DMA and modem interface

 12. Versatile interrupt system

       – Single interrupt output with eight maskable interrupting conditions

       – Output port can be configured to provide a total of up to six separate wire-ORable interrupt outputs

       – Each FIFO can be programmed for four different interrupt levels

       – Watch dog timer for each receiver

 13. Maximum data transfer rates: 1X – 1Mb/sec, 16X – 1Mb/sec

 14. Automatic wake-up mode for multidrop applications

 15. Start-end break interrupt/status

 16. Detects break which originates in the middle of a character

 17. On-chip crystal oscillator

 18. Power down mode

 19. Receiver timeout mode

 20. Single +5V power supply

 21. Powers up to emulate SCC2692

Pin definition (SOIC-28 key pins)

Typical application circuit

             RS-485 network node:

                          VCC ─── 3.3V (0.1μF decoupling capacitor in parallel)

                          TXD1 ── MCU's UART_TX

                          RXD1 ── MCU's UART_RX

                          A/B ─── 120Ω terminal resistor ─── differential bus

                          DIR ─── GPIO control transmission enable

Application scenarios

   1. Industrial communication: Modbus RTU network

   2. Building automation: BACnet controller

   3. Medical equipment: multi-device data acquisition

   4. POS terminal: multi-peripheral interface expansion

Package

   1. 40-pin 0.6-inch wide DIP package

   2. 44-pin PLCC package

   3. 44-pin plastic quad flat package (PQFP)

Design considerations

   1. Signal integrity:

       - RS-485 bus requires twisted pair wiring

       - Both ends of the bus must be connected to a 120Ω terminal resistor

   2. Power management:

       - It is recommended to use ferrite beads to isolate analog/digital power

       - Each power pin is configured with a 0.1μF+10μF capacitor

The specific data is subject to PDF, and the above content is for reference