Allicdata Part #: | SCANSTA111SM/NOPB-ND |
Manufacturer Part#: |
SCANSTA111SM/NOPB |
Price: | $ 0.00 |
Product Category: | Integrated Circuits (ICs) |
Manufacturer: | Texas Instruments |
Short Description: | IC SCAN BRIDGE MULTIDROP 49FBGATesting Equipment I... |
More Detail: | N/A |
DataSheet: | SCANSTA111SM/NOPB Datasheet/PDF |
Quantity: | 2011 |
Series: | -- |
Packaging: | Tray |
Part Status: | Active |
Applications: | Testing Equipment |
Interface: | IEEE 1149.1 |
Core Processor: | -- |
Voltage - Supply: | 3 V ~ 3.6 V |
Program Memory Type: | -- |
Package / Case: | 49-LFBGA |
Controller Series: | -- |
Supplier Device Package: | 49-BGA (7x7) |
RAM Size: | -- |
Mounting Type: | Surface Mount |
Base Part Number: | SCANSTA111 |
Number of I/O: | -- |
Operating Temperature: | -- |
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1. DESCRIPTION
The SCANSTA111SM/NOPB extends the IEEE Std. 1149.1 test bus into a multidrop test bus environment. The advantage of a multidrop approach over a single serial scan chain is improved test throughput and the ability to remove a board from the system and retain test access to the remaining modules. Each SCANSTA111 supports up to 3 local IEEE 1149.1 scan rings which can be accessed individually or combined serially. Addressing is accomplished by loading the instruction register with a value matching that of the Slot inputs. Backplane and inter-board testing can easily be accomplished by parking the local TAP Controllers in one of the stable TAP Controller states via a Park instruction. The 32-bit TCK counter enables built in self test operations to be performed on one port while other scan chains are simultaneously tested.
2. FEATURES
1. True IEEE 1149.1 Hierarchical and Multidrop Addressable Capability
2. The 7 Slot Inputs Support Up to 121 Unique Addresses, an Interrogation Address, Broadcast Address, and 4 Multi-Cast Group Addresses (Address 000000 is Reserved)
3. 3 IEEE 1149.1-Compatible Configurable Local Scan Ports
4. Mode Register0 Allows Local TAPs to be Bypassed, Selected for Insertion Into the Scan Chain Individually, or Serially in Groups of Two or Three
5. Transparent Mode can be Enabled with a Single Instruction to Conveniently Buffer the Backplane IEEE 1149.1 Pins to those on a Single Local Scan Port
6. LSP ACTIVE Outputs Provide Local Port Enable Signals for Analog Busses Supporting IEEE 1149.4.
7. General Purpose Local Port Pass-Through Bits are Useful for Delivering Write Pulses for FPGA Programming or Monitoring Device Status.
8. Known Power-Up State
9. TRST on All Local Scan Ports
10. 32-Bit TCK Counter
11. 16-Bit LFSR Signature Compactor
12. Local TAPs can become TRI-STATE via the OE Input to Allow an Alternate Test Master to Take Control of the Local TAPs (LSP0-2 Have a TRI-STATE Notification Output)
13. 3.0-3.6V VCC Supply Operation
14. Power-Off High Impedance Inputs and Outputs
15. Supports Live Insertion/Withdrawal
3. Pin configuration
4. PIN DESCRIPTIONS
5. Application overview
1. Addressing scheme-The SCANSTA111 architecture extends the functions of the IEEE 1149.1 standard By supplementing the protocol with an addressing scheme, the scheme allows the test controller to interact with 'STA111s' STA111s within the network. The network can include multipoint and hierarchical Connectivity. In fact, the'STA111 architecture allows the test controller to dynamically select specific parts Such a network is used to participate in scanning operations. This allows for the division of complex systems into smaller Blocks used for testing purposes. 'STA111 provides two levels of test network partition function. First, a test controller can select a single "STA111", a specific "STA111 group" (multicast group) or all "STA111" (broadcast). The'STA111-selection process is supported by the Level-1 communication protocol. 2. Each time a "STA111" is selected, the test controller can select one or more of the three local scan ports of the chip. That is, A single local port can be selected to include the controller in the (single) scan chain presented to the test by'STA111. This mechanism allows the controller to select a specific terminal scan chain network in the overall scan. The port selection process is supported by the Level-2 protocol.
2. Hierarchical support-multiple SCANSTA111 can be used to assemble hierarchical boundary scan Tree. In this configuration, the system tester can configure a set of local ports of STA111s to Connect a specific set of local scan chains to the active scan chain. Using this feature, testers can Selectively communicate with specific parts of the target system. The scan port of the tester is connected to 'STA111s The backplane scan port of the root layer, each of which can be selected using multipoint addressing. A sort of By connecting the local port (LSP) of the root layer, the second layer'STA111s can be connected to the root layer 'STA111 to the second layer' Backplane port of STA111. This process can continue to build a multi-level Scan the hierarchy. 'STA111 local port is not cascaded to a higher level' STA111s can be considered Scan the terminal leaves of the tree. The test master can select one or more target leaves through selection and configuration Test the appropriate group of local ports of "STA111" in the tree. Please consult your ATPG tool vendor to ensure that this feature is supported.
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