SI53313-B-GMR Allicdata Electronics
Allicdata Part #:

SI53313-B-GMR-ND

Manufacturer Part#:

SI53313-B-GMR

Price: $ 2.21
Product Category:

Integrated Circuits (ICs)

Manufacturer: Silicon Labs
Short Description: IC TRANSLATOR BUFF/LEVEL 44QFN
More Detail: Clock Fanout Buffer (Distribution), Translator IC ...
DataSheet: SI53313-B-GMR datasheetSI53313-B-GMR Datasheet/PDF
Quantity: 1000
1000 +: $ 2.00932
Stock 1000Can Ship Immediately
$ 2.21
Specifications
Series: --
Packaging: Tape & Reel (TR) 
Part Status: Active
Type: Fanout Buffer (Distribution), Translator
Number of Circuits: 2
Ratio - Input:Output: 1:5
Differential - Input:Output: Yes/Yes
Input: CML, HCSL, LVCMOS, LVDS, LVPECL
Output: CML, HCSL, LVCMOS, LVDS, LVPECL
Frequency - Max: 1.25GHz
Voltage - Supply: 1.71 V ~ 3.63 V
Operating Temperature: -40°C ~ 85°C
Mounting Type: Surface Mount
Package / Case: 44-VFQFN Exposed Pad
Supplier Device Package: 44-QFN (7x7)
Base Part Number: SI53313
Description

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The SI53313-B-GMR is a clock buffer, driver, and regenerator designed to assist in the management of timing critical tasks. The SI53313-B-GMR is utilized in many applications, including end-use system controllers, personal computers, and server units. It is an inherently low-jitter clock driver and provides 8bit I2C control with buffering and independent buffer power supplies. The gross jitter of the output of the SI53313-B-GMR is minimized to 23ps peak-to-peak maximum over the -40 °C to +105 °C temperature range. This device uses a Generalized Micro-Ring technology to guarantee operation from 0V to 4.2V power supply and provides a spread spectrum output as well. The SI53313-B-GMR is organized with two bidirectional serial control loops and one data loop. The bidirectional control loops are used to read the serial control data and clock the serial control data out to A and B serial links. The data loop is used to read data and clock data out to two serial output data streams. The SI53313-B-GMR is designed to operate with a clock source of up to 156MHz and its dual output clock frequencies can be independently programmed with no wait states. It also integrates a high impedance (HIZ) signal that can be used as a logic or as a bus or Control In signal (CI). As part of the “Generalized MicroRing” structure, the SI53313-B-GMR includes:

  • 8-channel buffer and regenerator.
  • Clock forest, based on the Controlled Impedance MicroRing (CIR).
  • Optimized Automatic Gain Control (AGC) loop.
  • Clock synchronization and phase detection circuits.
  • Comprehensive jitter reduction features.
  • Silent mode (non-destructive) operation.
The SI53313-B-GMR designed with a single-rail configuration. This factor allows multiple independent traces to be routed in parallel, enabling the wiring process to be much simpler and more efficient. Additionally, this makes the device suitable for applications where the highest performance is required and the power and area constraints are tight.The CIR promotes phase detection and clock synchronization, and eliminates the need for propagation delays. All the main stages that contribute to the jitter reduction have been incorporated into the SI53313-B-GMR, such as jitter threshold control and jitter filter, frequency synthesizer, AGC, and edge rate control. The SI53313-B-GMR also provides a method for reducing the gross jitter from input clock signals to the output. The buffer and regenerator-based design offers higher performance characteristics compared to conventional buffers with multiple gain stages. The SI53313-B-GMR can be controlled via an I2C interface. This I2C interface allows the user to program the delay between inputs and outputs, among other parameters. Additionally, the device offers an 8bit parallel-I/O bus, which permits use of a wide variety of signals, and can be used to control the power-down, the spread-spectrum feature, and the reset mode. The SI53313-B-GMR is loaded with a range of features such as high time resolution, low power consumption, and wide supply voltage range. It is ideal for embedded applications particularly those requiring high-performance timing control or buffering. It is available as embedded device in several pad configurations, and supports a wide range of signaling rates and duty cycle range.In conclusion, the SI53313-B-GMR provides a highly efficient and low-cost clock buffering and regenerative solution, designed to counter electromagnetic interference and to reduce the power requirements of numerous timing critical tasks. This device will prove valuable in many applications and is expected to become popular in embedded applications.

The specific data is subject to PDF, and the above content is for reference

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