SN74HC373PWR Integrated Circuits (ICs) |
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| Allicdata Part #: | 296-8311-2-ND |
| Manufacturer Part#: |
SN74HC373PWR |
| Price: | $ 0.00 |
| Product Category: | Integrated Circuits (ICs) |
| Manufacturer: | Texas Instruments |
| Short Description: | IC OCTAL TRANSP LATCH 20-TSSOP |
| More Detail: | D-Type Transparent Latch 1 Channel 8:8 IC Tri-Stat... |
| DataSheet: | SN74HC373PWR Datasheet/PDF |
| Quantity: | 8000 |
Specifications
| Series: | 74HC |
| Packaging: | Tape & Reel (TR) |
| Part Status: | Active |
| Logic Type: | D-Type Transparent Latch |
| Circuit: | 8:8 |
| Output Type: | Tri-State |
| Voltage - Supply: | 2 V ~ 6 V |
| Independent Circuits: | 1 |
| Delay Time - Propagation: | 15ns |
| Current - Output High, Low: | 7.8mA, 7.8mA |
| Operating Temperature: | -40°C ~ 85°C |
| Mounting Type: | Surface Mount |
| Package / Case: | 20-TSSOP (0.173", 4.40mm Width) |
| Supplier Device Package: | 20-TSSOP |
| Base Part Number: | 74HC373 |
Description
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The SN74HC373PWR is a monolithic CMOS latch circuit incorporated into Texas Instruments\' advanced silicon-gate CMOS process, designed for high noise immunity and high-speed performance. This device can be used to store binary data, such as voice and data, that require constant monitoring and protection from random noise.The SN74HC373PWR offers two separate data latches, ideal for data retention and management. Each latch is composed of two cross-coupled inverters and a set-reset input which enables or disables the latch. The output buffers are wired in series to maximize noise immunity.The SN74HC373PWR\'s application field includes digital transmission and storage systems in which data must be stored and updated continuously, such as digital signal processing systems, voice and audio processing systems, or memory controllers.The SN74HC373PWR has an input NOR gate composed of two complementary CMOS inverters and an input NAND gate made up of two cross-coupled CMOS inverters, as well as a common enable signal. When the enable signal is active, data (D and/or Q) at the inputs pass through the gates and are stored in the output register. With the signal inactive, the register remains at the stored state. This type of behavior is known as a Level Sensitive Latched Device, or LSLD. The SN74HC373PWR has two major parts: the data latches and the output buffers. The data latches contain two inputs; one is used to read data and the other is used to write data. The data latches will store the information that the inputs receive and make the output of the latch match the data that was read. The output buffers provide the outputs for the latched data. They are including P-channel and N-channel MOSFETs (NMOS, PMOS) to provide the driving capability for the outputs. The SN74HC373PWR also provides protection against random noise and switching transients, preventing the system from accumulating any errors due to jitter or noise. It also offers a variety of configuration options, thanks to its wide range of available logic options and its pin-compatible family members.In conclusion, the SN74HC373PWR is a powerful device used for storing data and is suitable for use in many applications. Its features include high noise immunity, high-speed performance and low power consumption, making it an ideal solution for data retention and management.
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SN74HC373PWR Datasheet/PDF