SN74LS90DR

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The SN74LS90DR is an integrated counter chip that finds its application in timing, decision making and counting processes. It is mainly used to count down or count up a prescribed number of events or clocks in order to determine when a particular actionshould occur. The chip can be programmed for various counting modes allowing for larger intervals or extended pulse generation.

The SN74LS90DR logic chip has two four-bit decade counters that count from 0 to 9, making it ideal for counting applications.It also has four outputs that correspond to the four bits within the counter allowing for synchronization with external devices asneeded. Its operation begins with the state of the count being set by asserting the clock input. The chip then counts up or downthrough each decade from 0-9 depending on the counter mode set.

The chip has two functional sections: one is the count logic and the other is the decoder logic. The count logic section consistsof two four-bit synchronous up/down divide by two counters, wired in series (cascaded). This provides a divide by 10 counts and iscomplemented by three additional divide by two counters. The two sections are synchronized by a common clock input with thecounts being presented on the four Q outputs.

The decoder logic consists of logic circuits that generate four output signals corresponding to the numerical states of thetwo counters. The first output is generated when both counters are at their initial count of 0. The second output is generatedwhen the first counter reaches the count 7, and the third output is generated when the first counter reaches the count 8. Thefourth output is generated when both counters are at their maximum count of 9. All outputs are active high, with the exception of the first output which is active low.

The SN74LS90DR is also able to output a series of pulses, known as the pulse-width modulation pulse, in situations where a pulsewith varying durations is needed. For this application the chip is set up in the down counter mode, beginning with a preset count immediately followed by the generation of a clock pulse. The count is then incremented towards the preset value by the internaldivider and the output is available at the rising edge of the pulses. When the preset count value is reached, the count is reset to0 and the process repeats itself.

In conclusion, the SN74LS90DR is a versatile chip that can be programmed to perform a variety of counting and pulse generationtasks. It is ideal for timing, decision making and other counting processes where accurate counting needs to be achieved. Itcan provide support for detecting various types of events and can be used to produce output pulses of varying widths.

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