STM32F030C6T6

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1. Describe

The STM32F030C6T6 microcontrollers feature a high-performance Arm® Cortex®-M0 32-bit RISC core running at 48 MHz, high-speed embedded memory (up to 256 KB Flash and up to 32 KB SRAM), and a wide range of Enhanced peripherals and I/O. All devices offer standard communication interfaces (up to two I2C, up to two SPI, and up to six USARTs), a 12-bit ADC, seven general-purpose 16-bit timers, and an advanced control PWM timer. STM32F030C6T6 microcontrollers operate from -40 to +85 °C Range from 2.4 to 3.6V supplies. A comprehensive set of power-saving modes allows the design of low-power applications. The STM32F030C6T6 microcontrollers include devices in four different packages, ranging from 20-pin to 64-pin. Depending on the device selected, different sets of peripherals are included. The description below provides an overview of the entire scope STM32F030C6T6 peripherals. These features make the STM32F030C6T6 microcontrollers suitable for a wide range of applications such as application control and user interface, handheld devices, A/V receivers and digital TVs, PC peripherals, gaming and GPS platforms, industrial applications, PLCs, inverters, printers, scanners, alarm systems, video intercoms and HVAC.

2. Feature

    1. Core: Arm® 32-bit Cortex®-M0 CPU, frequency up to 48 MHz

    2. Memories

        – 16 to 256 KB Flash

        – 4 to 32 KB of SRAM with hardware parity

    3. CRC calculation unit

    4. Reset and power management

        – Digital and I/O power supply: VDD = 2.4 V to 3.6 V

        – Analog supply: VDDA = VDD to 3.6 V

        – Power-on/power-down reset (POR/PDR)

        – Low power modes: sleep, stop, standby

    5. Clock management

        – 4 to 32 MHz crystal oscillator

        – 32 kHz oscillator for RTC with calibration

        – Internal 8 MHz RC with x6 PLL option

        – Internal 40 kHz RC oscillator

    6. Up to 55 fast I/Os

        – All mappable to external interrupt vectors

        – Up to 55 5V tolerant I/Os

    7. 5-channel DMA controller

    8. One 12-bit, 1.0 µs ADC (up to 16 channels)

        – Conversion range: 0 to 3.6 V 

        – Separate analog power supply: 2.4 V to 3.6 V

    9. Calendar RTC with alarm and periodic wakeup from stop/standby

  10. 11 timers

        – A 16-bit advanced control timer for Six-channel PWM output

        – Up to 7 16-bit timers, up to 4 IC/OC, OCN, can be used for IR control decoding

        – Standalone and system watchdog timers

        – SysTick timer

  11. Communication Interface

        – Up to two I2C interfaces

        – Fast Mode Plus (1 Mbit/s) support One or two I/Fs with 20 mA current sink

        – SMBus/PMBus support (on a single I/F)

        – Up to 6 USARTs support the master Synchronous SPI and modem control; a With automatic baud rate detection

        – Up to two SPIs (18 Mbit/s), 4 to 16 Programmable bit frame

  12. Serial Wire Debug (SWD)

  13. All packaging ECOPACK®2

3. Pin configuration

4. Low-power modes

The STM32F030C6T6 microcontrollers support three low-power modes to achieve the best compromise between low power consumption, short startup time and available wakeup sources:

    1. Sleep mode

        In Sleep mode, only the CPU is stopped. All peripherals continue to operate and can wake up the CPU when an interrupt/event occurs.

    2. Stop mode

        Stop mode achieves very low power consumption while retaining the content of SRAM and registers. All clocks in the 1.8 V domain are stopped, the PLL, the HSI RC and the HSE crystal oscillators are disabled. The voltage regulator can also be put either in normal or in low power mode. The device can be woken up from Stop mode by any of the EXTI lines. The EXTI line source can be one of the 16 external lines and RTC.

    3. Standby mode

        The Standby mode is used to achieve the lowest power consumption. The internal voltage regulator is switched off so that the entire 1.8 V domain is powered off. The PLL, the HSI RC and the HSE crystal oscillators are also switched off. After entering Standby mode, SRAM and register contents are lost except for registers in the RTC domain and Standby circuitry. The device exits Standby mode when an external reset (NRST pin), an IWDG reset, a rising edge on the WKUP pins, or an RTC event occurs.

5. Clocks and startup

System clock selection is performed on startup, however the internal RC 8 MHz oscillator is selected as default CPU clock on reset. An external 4-32 MHz clock can be selected, in which case it is monitored for failure. If failure is detected, the system automatically switches back to the internal RC oscillator. A software interrupt is generated if enabled. Similarly, full interrupt management of the PLL clock entry is available when necessary (for example on failure of an indirectly used external crystal, resonator or oscillator). Several prescalers allow the application to configure the frequency of the AHB and the APB domains. The maximum frequency of the AHB and the APB domains is 48 MHz.