
Allicdata Part #: | 497-11605-ND |
Manufacturer Part#: |
STM32F407VGT6 |
Price: | $ 8.03 |
Product Category: | Integrated Circuits (ICs) |
Manufacturer: | STMicroelectronics |
Short Description: | IC MCU 32BIT 1MB FLASH 100LQFPARM® Cortex®-M4 STM3... |
More Detail: | N/A |
DataSheet: | ![]() |
Quantity: | 9857 |
1 +: | $ 8.02620 |
10 +: | $ 7.78541 |
100 +: | $ 7.62489 |
1000 +: | $ 7.46437 |
10000 +: | $ 7.22358 |
Series: | STM32F4 |
Packaging: | Tray |
Part Status: | Active |
Applications: | -- |
Core Processor: | ARM® Cortex®-M4 |
Core Size: | 32-Bit |
Speed: | 168MHz |
Controller Series: | -- |
Connectivity: | CANbus, DCMI, EBI/EMI, Ethernet, I²C, IrDA, LINbus, SPI, UART/USART, USB OTG |
Peripherals: | Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT |
Interface: | CAN, I2C, SDIO, I2S |
Number of I/O: | 82 |
Program Memory Size: | 1MB (1M x 8) |
Voltage - Supply: | -40°C ~ 85°C |
Program Memory Type: | FLASH |
EEPROM Size: | -- |
Mounting Type: | Surface Mount |
RAM Size: | 192K x 8 |
Voltage - Supply (Vcc/Vdd): | 1.8 V ~ 3.6 V |
Data Converters: | A/D 16x12b, D/A 2x12b |
Oscillator Type: | Internal |
Operating Temperature: | -40°C ~ 85°C (TA) |
Package / Case: | 100-LQFP |
Supplier Device Package: | 100-LQFP (14x14) |
Base Part Number: | STM32F407 |
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1. Description
The STM32F407VGT6 series is based on the high-performance ARM Cortex-M4 32-bit RISC core, and its operating frequency is up to 168 MHz. The Cortex-M4 core has a floating point unit (FPU) single precision, which supports all ARM single precision data processing instructions and data types. It also implements a full set of DSP instructions and a memory protection unit (MPU), thereby enhancing the security of the application. The STM32F405xx and STM32F407xx series integrate high-speed embedded memory (up to 1 MB of flash memory, up to 192 KB of SRAM flash memory) , To 4 KB of spare SRAM, and a wide range of enhanced I/O and peripherals connected to two APB buses, three AHB buses and a 32-bit multi-AHB bus matrix. All devices provide three 12-bit ADCs, two DACs, a low-power RTC, and twelve general-purpose 16-bit timers, including two PWM timers for motor control and two general-purpose 32-bit timers. A true random number generator (RNG). They also have standard and advanced communication interfaces.
2. Features
1. Core: Arm® 32-bit Cortex®-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator) allowing 0-wait state execution from Flash memory, frequency up to 168 MHz, memory protection unit, 210 DMIPS/ 1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions
2. Memories
– Up to 1 Mbyte of Flash memory
– Up to 192+4 Kbytes of SRAM including 64- Kbyte of CCM (core coupled memory) data RAM
– 512 bytes of OTP memory
– Flexible static memory controller supporting Compact Flash, SRAM, PSRAM, NOR and NAND memories
3. LCD parallel interface, 8080/6800 modes
4. Clock, reset and supply management
– 1.8 V to 3.6 V application supply and I/Os
– POR, PDR, PVD and BOR
– 4-to-26 MHz crystal oscillator
– Internal 16 MHz factory-trimmed RC (1% accuracy)
– 32 kHz oscillator for RTC with calibration
– Internal 32 kHz RC with calibration
5. Low-power operation
– Sleep, Stop and Standby modes
– VBAT supply for RTC, 20×32 bit backup registers + optional 4 KB backup SRAM
6. 3×12-bit, 2.4 MSPS A/D converters: up to 24 channels and 7.2 MSPS in triple interleaved mode
7. 2×12-bit D/A converters
8. General-purpose DMA: 16-stream DMA controller with FIFOs and burst support
9. Up to 17 timers: up to twelve 16-bit and two 32- bit timers up to 168 MHz, each with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input
10. Debug mode
– Serial wire debug (SWD) & JTAG interfaces
– Cortex-M4 Embedded Trace Macrocell™
11. Up to 140 I/O ports with interrupt capability
– Up to 136 fast I/Os up to 84 MHz
– Up to 138 5 V-tolerant I/Os
12. Up to 15 communication interfaces
– Up to 3 × I2C interfaces (SMBus/PMBus)
– Up to 4 USARTs/2 UARTs (10.5 Mbit/s, ISO 7816 interface, LIN, IrDA, modem control)
– Up to 3 SPIs (42 Mbits/s), 2 with muxed full-duplex I2S to achieve audio class accuracy via internal audio PLL or external clock
– 2 × CAN interfaces (2.0B Active)
– SDIO interface
13. Advanced connectivity
– USB 2.0 full-speed device/host/OTG controller with on-chip PHY
– USB 2.0 high-speed/full-speed device/host/OTG controller with dedicated DMA, on-chip full-speed PHY and ULPI
– 10/100 Ethernet MAC with dedicated DMA: supports IEEE 1588v2 hardware, MII/RMII
3. Application
1. Motor drive and application control
2. Medical equipment
3. Industrial applications: PLC, inverter, circuit breaker
4. Printers and scanners
5. Alarm system, video intercom and HVAC
6. Home audio equipment
4. pin description
5. Fully compatible with all series
STM32F405xx and STM32F407VGT6 are part of the STM32F4 series. They are fully pinto-pin, software and functional compatible with STM32F2xx devices, allowing users Try different memory densities, peripherals and performance (FPU, higher frequency) Gain greater freedom in the development cycle. STM32F405xx and STM32F407xx devices are compatible with The entire STM32F10xxx series. All function pins are pin-to-pin compatible. this However, STM32F405xx and STM32F407xx are not STM32F10xxx devices: The power schemes of the two series are different, so their The power pins are different.
6. Embedded SRAM
1. Up to 192 KB of system SRAM, including 64 KB of CCM (core coupled memory)Data memory RAM memory is accessed (read/write) at the CPU clock speed, and the wait state is 0.
2. 4 KB backup SRAM This area can only be accessed from the CPU. Its content is protected from potentially unwanted write accesses, and is kept in standby or VBAT mode.
7. DMA controller
The device has two general-purpose dual-port DMAs (DMA1 and DMA2) with 8 Each stream. They can manage memory to memory, peripherals to memory and Transfer from memory to peripherals. They have dedicated FIFOs for APB/AHB peripherals, Support burst transmission, designed to provide maximum peripheral bandwidth (AHB/APB). Two DMA controllers support circular buffer management, so no specific code is required Required when the controller reaches the end of the buffer. The two DMA controllers also With double buffering function, two memories can be used and switched automatically No special code buffer is required. Each stream is connected to a dedicated hardware DMA request and supports software Trigger on every stream. The configuration is between the software and the transfer size The source and destination are independent. DMA can be used for the main peripherals:
1. SPI and I2S
2. A generation 2C
3. USART
4. General, basic and advanced control timer TIMx
5. Digital-to-analog converter
6. SDIO
7. Camera interface (DCMI)
8. ADC.
8. Digital-to-analog converter (DAC)
Two 12-bit buffered DAC channels can be used to convert two digital signals into two Analog voltage signal output. This dual digital interface supports the following functions:
1. Two DAC converters: one for each output channel
2. 8-bit or 12-bit monotonic output
3. Left or right data alignment in 12-bit mode
4. Synchronous update capability
5. Noise wave generation
6. Triangular wave generation
7. Independent or simultaneous conversion of dual DAC channels
8. DMA function for each channel
9. External trigger for conversion
10. Input voltage reference VREF+
9. Package information
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