TPIC6C596PW Allicdata Electronics
Allicdata Part #:

296-19605-5-ND

Manufacturer Part#:

TPIC6C596PW

Price: $ 1.48
Product Category:

Integrated Circuits (ICs)

Manufacturer: Texas Instruments
Short Description: IC PWR 8-BIT SHIFT REGIS 16TSSOP
More Detail: N/A
DataSheet: TPIC6C596PW datasheetTPIC6C596PW Datasheet/PDF
Quantity: 1080
1 +: $ 1.48000
10 +: $ 1.43560
100 +: $ 1.40600
1000 +: $ 1.37640
10000 +: $ 1.33200
Stock 1080Can Ship Immediately
$ 1.48
Specifications
Series: TPIC
Packaging: Tube 
Part Status: Active
Type: DESCRIPTION
Logic Type: Shift Register
Topology: --
Output Type: Open Drain
Internal Switch(s): --
Number of Elements: 1
Number of Outputs: --
Number of Bits per Element: 8
Function: Serial to Parallel, Serial
Voltage - Supply (Min): --
Voltage - Supply (Max): --
Voltage - Supply: 4.5 V ~ 5.5 V
Voltage - Output: --
Operating Temperature: -40°C ~ 125°C
Current - Output / Channel: --
Mounting Type: Surface Mount
Frequency: --
Package / Case: 16-TSSOP (0.173", 4.40mm Width)
Dimming: --
Supplier Device Package: 16-TSSOP
Applications: --
Base Part Number: PIC6C596
Description

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1. Describe

The TPIC6C596PW device is a monolithic, medium voltage, low current, 8-bit shift register designed for systems requiring relatively moderate load power, such as LEDs. The device includes a built-in voltage clamp on the output for inductive transient protection. Power driver applications include relays, solenoids and other low current or medium voltage loads. The device contains an 8-bit serial-in, parallel-out shift register that provides data to an 8-bit D-type storage register. Data is transferred through the shift register and the storage register on the rising edge of the shift register clock (SRCK) and register clock (RCK), respectively. When the shift register clear (CLR) is high, the storage register transfers data to the output buffer. When CLR is low, all registers in the device are cleared. When the output enable (G) is held high, all data in the output buffer is held low and all sink outputs are turned off. When G is held low, data from the storage register is transparent to the output buffer. When the data in the output buffer is low, the DMOS transistor output is turned off. When data is high, the DMOS transistor output is capable of sinking current. The serial output (SER OUT) is output to the device on the falling edge of SRCK to provide additional hold time for cascading applications. This will provide better performance for applications where clock signals may be skewed, devices are not close to each other, or systems must tolerate electromagnetic interference. The outputs are low-side, open-drain DMOS transistors with output ratings of 33 V and 100 mA continuous sink capability. Each output provides a maximum current limit of 250 mA at TC = 25°C. The current limit decreases as the junction temperature increases to provide additional device protection. The device also provides ESD protection up to 2500 V when tested with the Human Body Model and the 200 V Machine Model. The TPIC6C596 device features an operating case temperature range of -40°C to 125°C.

2. Feature

    1. Low RDS(on), 7 Ω (typ)

    2. Avalanche energy, 30 mJ

    3. Eight 100mA continuous current power DMOS transistor outputs

    4. 250mA current limit capability

    5. ESD protection, 2500 V

    6. Output clamping voltage, 33 V

    7. Enhanced multi-level cascading

    8. Single input clears all registers

    9. Low power consumption

3. Application

    1. Instrument cluster

    2. Notice Lights

    3. LED lighting and controls

    4. Automotive relay or solenoid driver

4. Function description

    1. Serial interface

        The TPIC6C596PW device contains an 8-bit serial-in, parallel-out shift register that provides data to an 8-bit D-type storage register. Data is transferred through the shift register and the storage register on the rising edge of the shift register clock (SRCK) and register clock (RCK), respectively. When the shift register clear (CLR) is high, the storage register transfers data to the output buffer.

    2. Output control

        Holding the output enable (G) high keeps all data in the output buffer low and all sink outputs are turned off. Holding G low makes the data from the storage register transparent to the output buffer. When the data in the output buffer is low, the DMOS transistor output is turned off. When data is high, the DMOS transistor output is capable of sinking current. This pin can also be used for global PWM dimming.

5. Application Information

The TPIC6C596PW device is a serial-in parallel-out, Power+LogicE 8-bit shift register with low-side switching DMOS The output rating for each channel is 100 mA. The device is designed to drive resistive and inductive loads and is Particularly suitable as an interface between a microcontroller and an LED or lamp. TPIC6C596 devices are Enhancement of the TPIC6C595 device where the shift register serial output (SER OUT) is Falling edge of serial clock to provide additional hold time in multiple device applications cascade.


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