Allicdata Part #: | UC3707DWG4-ND |
Manufacturer Part#: |
UC3707DWG4 |
Price: | $ 3.54 |
Product Category: | Integrated Circuits (ICs) |
Manufacturer: | Texas Instruments |
Short Description: | IC DUAL CH PWR DRIVER 16-SOIC |
More Detail: | Low-Side Gate Driver IC Inverting, Non-Inverting 1... |
DataSheet: | UC3707DWG4 Datasheet/PDF |
Quantity: | 1000 |
120 +: | $ 3.21957 |
Logic Voltage - VIL, VIH: | 0.8V, 2.2V |
Base Part Number: | UC3707 |
Supplier Device Package: | 16-SOIC |
Package / Case: | 16-SOIC (0.295", 7.50mm Width) |
Mounting Type: | Surface Mount |
Operating Temperature: | 0°C ~ 70°C (TA) |
Rise / Fall Time (Typ): | 40ns, 40ns |
Input Type: | Inverting, Non-Inverting |
Current - Peak Output (Source, Sink): | 1.5A, 1.5A |
Series: | -- |
Voltage - Supply: | 5 V ~ 40 V |
Gate Type: | N-Channel MOSFET |
Number of Drivers: | 2 |
Channel Type: | Independent |
Driven Configuration: | Low-Side |
Part Status: | Active |
Packaging: | Tube |
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The UC3707DWG4 is a gate driver controller intended to protect devices such as power transistors, power MOSFETs, and IGBTs from excessive drain current, overvoltage and/or negative gate voltage. These gate drivers are designed for use in off-line applications with rectified ac input from 10V to 500V. Their integral internal voltage clamp circuit prevents excessive gate turn-on energy and over-voltage stresses. It is well suited for driving power MOSFETs and insulated gate bipolar transistors (IGBTs) in applications such as motor controllers, dc-to-dc converters, power supplies, lighting ballasts and UPS systems. The UC3707DWG4 is pinout and software compatible with the UC1707DW.
The main application fields of the UC3707DWG4 are in off-line and isolated SMPS, such as flyback, forward and other topologies. The UC3707DWG4 helps to protect devices from drain current, overvoltage and/or negative gate voltage and is suitable for applications such as motor controllers, DC-to-DC converters, power supplies, lighting ballasts and UPS systems. The UC3707DWG4 requires a minimum on-time in order to achieve the specified main fault protective action.
The UC3707DWG4 works with a rectified ac input of 10V or higher. The input voltage is rectified by a pair of diodes connected between the source and the device\'s gate. The diodes function as a clamp to limit gate-to-source voltage. The gate drive voltage across the gate and source gate nodes is the input voltage minus approximately one forward diode drop. The design of the diodes makes sure that the current limiting action of the logic-level IGBTs start earlier than at the peak input voltage.
The UC3707DWG4 also features an integrated internal voltage clamp circuit which helps protect against excessive gate turn-on energy and stresses. The clamp circuit prevents possible secondary breakdowns when the gate drive voltage is exceeded. The clamp circuit consists of a MOSFET transistor with its gate connected to the +15V line bypassed with a 22nF capacitor. The drain is connected to the +15V line and the source is connected to the VIN- pin. The drain node of the MOSFET provides an internal overvoltage clamp reference voltage to which the gate current flows if the voltage between VIN- and VIN+ exceeds the 15V internal clamp reference.
The UC3707DWG4 design is optimized for driving mosfets, IGBTs and transistors with low jitter and low start-up current compared to other gate drivers on the market. The single-ended output current is of up to 400mA. Moreover, the appopriate voltage for the UC3707DWG4 is of 5V-24V. Also, high commonmode noise immunity is present with a frequency of 10,000 V/µs.
In conclusion, the UC3707DWG4 is a high-performance and reliable gate driver controller intended to protect power transistors, power MOSFETs, and IGBTs from excessive drain current, overvoltage and/or negative gate voltage in off-line applications. This device utilizes a rectified ac input of 10V or higher, an integrated internal voltage clamp circuit and high commonmode noise immunity for superior performance and reliability. It is primarily used in off-line and isolated SMPS such as flyback, forward and other topologies.
The specific data is subject to PDF, and the above content is for reference
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