How to design Ethernet interface based on FPGA and W3150A +?

1 Overall design of the Ethernet interface

1.1 Choice of Ethernet interface design

The design of the Ethernet interface usually has three schemes: one is to use FPGA to realize the description of each layer such as the physical layer, network layer, access layer and transmission layer. The second is to implement network transmission based on the physical layer network controller and microprocessor. The advantage of this solution is its flexibility. It can use different protocols for different systems and can simplify the protocol. The third is to use a dedicated protocol processing chip. To achieve Ethernet data transmission, the hardware circuit of this solution is relatively simple, the development cycle is short, and there are more and more chips to choose from, and it integrates multiple protocols and is very convenient to use.

This design uses a third interface scheme, which uses a dedicated TCP / IP protocol integrated chip, and the FPGA implements control of the protocol processing chip to achieve Ethernet data transmission. The protocol processing chip selects W3150A + which internally solidifies the TCP / IP protocol and cooperates with the physical layer chip RTL8201. The hardware circuit of this method is relatively simple, and can be realized by logic hardware, so that the system design is simpler and more compact.

1.2 Introduction to Ethernet Control Chip W3150A +

W3150A + is a TCP / IP protocol stack chip specially launched by WIZnet for Ethernet interconnection and embedded systems. W3150A + can implement protocols such as TCP, UDP, IP Ver.4, DHCP, ARP, and ICMP. At the same time, the network interface layer (including MAC sublayer and DLC sublayer) can also be implemented in the chip. At the same time, it can also provide four-way network connection. Its 16KB dual-port RAM can be used as a data buffer and can support full-duplex mode. It also has a standard MD interface for easy connection to the physical layer interface chip. In addition, WIZnet also provides the Socket API package, which can accelerate the development of application programs.

Figure 1 shows the block diagram of the W3150A + chip. As can be seen from Figure 1, W3150A + is mainly composed of 4 parts. The first part is the MCU interface. W3150A + provides direct bus interface, indirect bus interface and SPI bus interface. It is not only suitable for connecting with a bus like 8051 single chip microcomputer, but also very suitable for connecting with a controller with only IO port and no bus interface; the second part is the TCP / IP protocol stack. W3150A + has completely cured the protocols required from the MAC layer, network layer to the transport layer, so users do not need to understand the specific implementation methods and implementation codes of these protocols; the third part is the receive and send buffers, which communicate via Ethernet Data is exchanged through these buffers; the fourth part is the Ethernet physical layer interface (MII interface). W3150A + can be seamlessly connected with the physical layer chip RTL8201, thus achieving 10 / 100BaseT Ethernet physical interface.

The internal registers of W3150A + are divided into two memories and two types of registers. The two memories are used for input and output of data transmission. The two types of registers are general registers and port registers. Each type of register contains a large number of status word control registers. The following briefly introduces the more important status word control register.

Sn_MR: Port n mode register, this register is used to set the port options or protocol type;

Sn_CR: Port n command register, this register is used to set the port initialization, close, establish connection, disconnect, data transmission and command acceptance, etc .;

Sn_IR: Port n interrupt register, this register is used to display information such as establishing and terminating connection, receiving data, sending completion and time overflow;

Sn_PORT: Port number register of port n, this register can set the corresponding port number in TCP or UDP mode;

S_TX_FSR: Port n transmit memory remaining space register, this register is used to indicate the size of the transmit data space that the user can use, before sending data, the user must first check the size of the remaining space, and then control the number of bytes of transmitted data;

Sn_TX_RR: Port n transmit memory read pointer register. This register is used to indicate the current location of the transmit memory after the port is completed. When the command register of port n is received

After the SEND command, it can be sent from the current Sn_TX_RR to Sn_TX_WR data, after the transmission is completed, the value of Sn_TX_RR automatically changes;

Sn_TX_WR: Port n transfer write pointer register, this register can indicate the address when writing data to the TX memory;

Sn_RX_RSR: port n received data byte count register, this register is only the port received data buffer number of bytes of data, usually can be counted by the value of Sn_TX_RR to Sn_TX_WR

It is calculated that after writing the RECV command to the port n command register, the value of the register will automatically change and can receive data from the remote peer;

Sn_RX_RD: Port n receive buffer read pointer register, this register is only the read address information after the port receiving process is completed.

There are 4 independent ports (Socket) inside W3150A +, and their status and control are mapped in the second to fifth register areas respectively. Mainly used to realize the control of port working mode (TCP service

Server, TCP client, UDP or PPPOE, etc.), set the port number of the port, set the IP address and port number of the destination host of the port, and control the port receiving and sending data.

If you want to know more, our website has product specifications for Ethernet interface, you can go to ALLICDATA ELECTRONICS LIMITED to get more information