Can analog chips speed up machine learning?
Artificial intelligence may solve some of the toughest challenges in science and industry, but to achieve artificial intelligence requires a new generation of computer systems. By using the analog chip based on Phase-Change Memory, PCM for short, machine learning can be accelerated by a thousand times.
To realize the true potential of AI, with the support of the State University of New York and founding partners, IBM is building a research center to develop a new generation of AI hardware and looking forward to expanding its joint research in nanotechnology.
IBM Research AI Hardware Center partners include companies in the semiconductor industry chain, including strategic partners in IBM manufacturing and research, Samsung, and interconnect solutions company Mellanox Technologies, providing simulation and prototyping solutions software platform provider Synopsys, semiconductor devices The company Applied Materials and Tokyo Electron Limited (TEL).
Also collaborated with the organizers of the State University of New York Institute of Technology in Albany, New York, to expand infrastructure support and academic collaboration, and collaborate with the nearby Rensselaer Polytechnic Institute (RPI) Computing Innovation Center (CCI) for artificial intelligence and computing Academic cooperation in terms of aspects. Mukesh Khare, vice president of semiconductor and artificial intelligence hardware at IBM Research, said current machine learning limitations can be broken by using new processing hardware. For example: digital AI core and approximation calculations, memory calculations with analog cores, and simulation cores with optimized materials.
In IBM's research report, "Analog Non-Volatile Memory (NVM) can effectively accelerate the "Backpropagation" algorithm, which is at the heart of many of the latest advances in AI technology. These memories allow the use of basic physics. The "multiply-accumulate" operations used in these algorithms are parallelized in the analog domain at the location of the weight data.
The phase change memory is based on a sulfide glass material that changes its phase from crystalline to amorphous and recovers when a suitable current is applied. Each phase has a different level of resistance and is stable before the phase changes. The two resistors form a binary one or zero. PCM is non-volatile, access latency is comparable to DRAM levels, and they are all representative of storage-level memory. The 3D XPoint technology jointly developed by Intel and Micron is based on PCM.
“When multiplying large-scale circuits and adding numbers together, we simply connect a small current through a resistor to a wire, and then connect many of these wires together to allow the current to build up. We can perform many calculations at the same time, not sequentially. Nor is it to transfer digital data between the digital memory chip and the processing chip, we can perform all calculations in the analog memory chip."
Mukesh Khare mentioned the mapping of deep neural networks (DNN) to analog crosspoint arrays (analog AI cores). They have non-volatile memory material at the intersection of the array to store weights. The values in the DNN calculation are weighted to improve the accuracy of the decision during training. These can be implemented directly with the crosspoint PCM array, without the host server CPU intervention, providing memory calculations without the need for data movement. In contrast to digital arrays such as Intel XPoint SSDs or DIMMs, this is an analog array.
Our analog AI core is part of a performance-efficient memory calculation that improves performance by eliminating data transfer between memory and breaking through the so-called von Neumann structural bottleneck. The deep neural network is mapped to an analog crosspoint array and new non-volatile material properties are switched to store network parameters in the intersection.
The PCM records synaptic weights along an 8-level gradient between the amorphous and crystalline states. The conductance or resistance of each step can be changed with an electrical pulse. These 8 levels provide 8-bit precision in DNN calculations.
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