The working principle of Intel single bridge H61 chip board start-up circuit.
The Intel H61 chipset is an upgrade of the H55 chipset, supporting the 1155-pin second-generation CPU. of 13, 15, and 17 The function of H61 chipset motherboard is greatly improved, and the ERP energy-saving circuit is set on the standby circuit of the motherboard, which greatly reduces the power consumption of the motherboard when it is on standby. The main difference between the H6I chipset and the normal motherboard after using the ERP energy-saving circuit is that there is no standby power supply before the motherboard does not press the switch. The Intel H6I chipset motherboard boot circuit works as shown in figure 1.
Figure 1 operating principle block diagram of the motherboard boot circuit of the Intel H61 chipset.
The Intel H61 chipset motherboard boot circuit works as follows.
The first stage: the main board installed the battery BATI through R299 sent to the DI0 Schottky transistor positive pole, from the negative output RTCVCC for the bridge real-time clock circuit power, RTCVCC after R411 and C465 capacitor delay to get RTCRST# high-level reset South Bridge chip RTC circuit.
The second stage: plug in ATX power supply and connect 220V AC market power, ATX power output ATX_5VSB, through voltage regulator step down to SB_3VSB power supply to IT8728F, used for IT8728F chip trigger module and ERP module power supply.
The third stage: the short switch generates the PANSHW# trigger signal to the 75 pins of the IT8728F, outputs the SLP_SUS_L signal after the internal logic circuit conversion, controls the ERP energy-saving circuit to step down to get the standby power supply of the 3VSB to the bridge and the IT8728F. IT8728F gets standby power supply after internal delay from 85-pin output RSMRST# high-level signal to the bridge, notifying the main board of the bridge standby power supply is normal. At the same time, the RSMRST# signal is pulled to the high level of the DPWROK through the resistor, and the transmission to the bridge indicates that the power supply is normal. The IT8728F internal delay then sends out the PWRON# of the 3.3V-0V-3.3V jump from the 72 feet to the bridge request to power on. The bridge sends a 3.3V continuous high-level SLP_S3# to the 71 pins of the IT8728F when standby conditions are normal and itself is normal, indicating that power is allowed. Finally, 1T8728F sends out a continuous low-level PSON# signal from 76 pins to pull down the green line of ATX power supply, so that the output of ATX power supply is + 12V, + 5V, + 3.3V to complete the power-up.
This article is from Allicdata Electronics Limited.