What are the classifications of programmable logic devices?

Last Update Time: 2023-08-17 18:01:14

1. programmable read-only memory (PROM)

  Programmable read-only memory can only be written once, so it is also called One Time Programming ROM (OTP-ROM). When the programmable read-only memory leaves the factory, the stored contents are all 1, and the user can write data 0 in some of the units as needed (some PROMs have all 0 data when they leave the factory, and the user can set some of the units Write 1) to achieve the purpose of programming.

2. PROM typical products are divided into two categories:

  Is a classic programmable read-only memory, which is a PROM using "Schottky diodes", which is a junction destruction circuit composed of diodes. When leaving the factory, the diode is in the reverse cut-off state, and the reverse voltage is applied to the "Schottky diode" by a large current method to cause its permanent breakdown.

The other type is a fuse type circuit composed of transistors. If you want to rewrite certain cells, you can pass a large enough current to these cells and maintain them for a certain period of time. The original fuse can be blown. Rewrite the effect of a certain person.

3. erasable programmable read-only memory (EPROM)

  The first EPROM that was successfully developed and put into use was erased by ultraviolet radiation. EPROM adopts MOS type circuit structure, and its memory cell is usually composed of stacked gate type MOS transistors, and stacked gate type MOS transistors usually adopt enhanced field effect transistor structure.

4. electrically erasable programmable read-only memory (EEPROM)

  EEPROM (also can be written as E2PROM) is a programmable ROM that can be erased and rewritten with electrical signals. It can not only erase the memory cell content as a whole, but also erase and rewrite word by word. The erasing and rewriting current of EEPROM is very small, and it can be carried out under normal working power supply, and there is no need to remove the device from the system when erasing.

5. Programmable Array Logic (PAL)

  PLA follows the fuse-type bipolar process used in the production of PROM devices. It has an "AND" array programmable and an "OR" array fixed structure, and it can also achieve a very high working speed. Compared with PROM, PLA devices have greatly reduced array size and can realize various logic functions more flexibly. PLA devices are simple to program and adaptable, and can replace a variety of commonly used small and medium-sized transistor logic devices.

6. General Array Logic (GAL)

  GAL is an electrically erasable and reprogrammable logic device. It has a flexible programmable output structure, which enables the few centralized GAL devices to replace almost all PAL devices and hundreds of small and medium-sized standard devices. Moreover, GAL adopts advanced EECMOS technology, which can complete the erasing and writing of the device within a few seconds, and allows repeated rewriting. Ordinary GAL devices and PAL devices have the same array structure, and both adopt an AND array programmable or fixed array structure.

7. complex programmable logic device (CPLD)

    CPLD is a large-scale integrated programmable logic device developed on the basis of PAL, GAL and other devices. Compared with PAL, GAL and other devices, the scale of CPLD is relatively large. One CPLD can replace dozens or even hundreds of general-purpose devices. IC chip. Although the CPLD mechanisms produced by different IC companies are very different, they generally include programmable logic macro cells (Logic Macro Cell, LMC), programmable I/O units, and programmable interconnects (Programmable Interconnect, PI). three parts.

8. erasable programmable logic device (EPLD)

    EPLD combines the advantages of large-scale integrated circuits such as small size, low price, and high reliability. Users can design special circuits according to their needs to avoid problems such as high prices and long cycles. The delay time of EPLD devices is predictable and fixed. Therefore, any function implemented on the function template in the EPLD device has the same speed. The functional modules are interconnected through unlimited internals, providing multiple programmable logic structures. And each functional module contains 9 programmable "and" "or" array-driven macrocells. The input of any one pin or the output of the macrocell can be connected to the input of another macrocell, which is unlimited. The programming interconnect structure ensures that the EPLD has 100% wiring capability.

 

If you want to know more, our website has product specifications for programmable logic devices, you can go to ALLICDATA ELECTRONICS LIMITED to get more information