What is a field-effect transistor?

Last Update Time: 2018-12-13 14:34:17

1.What is a field-effect transistor?

 Field effect transistor ( FET ) is a voltage controlled semiconductor device, which is a voltage control device. Because of its small driving current and stable working performance, it is widely applied to various electronic products.

 

2 .How does a junction field effect transistor work?

The basic structure of the  junction field effect transistor is PN junction. In the formation of PN junction of the N type semiconductor and the P type semiconductor, there are a lot of electrons in the N region. The holes are very small: there are a lot of holes in the P region and the electrons are very few, so there is a negative electron acceptor on the junction of PN junction, and there is no free electrons or holes in this region, so  it is called a depleted zone or a space charge zone.

 

When the reverse voltage is applied to the PN junction (P negative electrode, N connecting positive pole), the depletion region will expand into the semiconductor, widen the depletion area and control the space charge in the depletion area. If the impurity concentration in the N region is higher than the P Zone, it is carried out mainly in the P region; conversely, it is carried out in the N area.

 

 A N channel junction field effect transistor spreads two highly doped P types on both sides of a low doped N type region, forming two PN knots. Normally,the N area is thinner, and the two electrodes at both ends of the N region are called the electrode (with the letter D) and the source (with the letter S) the.P+ zone, called the gate (represented by the letter G).

When working normally, the drain is connected with the positive pole of the power supply, the source is connected with the negative pole of the power supply, and the grid is connected with the negative pole of the bias power supply. Because the grid is connected to the P+ region, the two PN junctions are coupled with a reverse voltage, with only a very small current flowing out of the grid. Because the leakage and the source are all connected to the N region, after the leakage and the source voltage are added, the current ID flows through the drain source when the grid voltage is not too high. It is formed by the majority of the carriers (electrons) in the N region. Because most of the depletion regions of the P+N junction are in the N region, when the reverse voltage is added, the depletion region is mainly extended to the N region, and the higher the voltage, the narrower the current can pass between the two depleted regions. The greater the negative pressure between the gate and the source, the thicker the two depletion regions become, the thinner the trench sandwiched in the middle, which makes the channel resistance increase, the leakage current Ip decreases, and otherwise the Ip increases. The leakage current Ip will vary with the voltage Vcs of the gate source. That is to say, gate source voltage Vcs can control leakage current ID.


In the front are two junction type field-effect transistors, which are formed in the P ten region with a thin N region, called N channel junction field effect transistor. Similarly, the two N+ regions are sandwiched with a thin P region to form P channel junction field effect transistor, but its normal voltage is opposite to that of N channel.

This article is from ALLICDATA ELECTRONICS LIMITED.