74F673APC

Due to market price fluctuations, if you need to purchase or consult the price. You can contact us or emial to us:   sales@allicdata.com

The 74F673APC is a high-speed, low power 8-bit shift register currently available in DIP-16 (Dual In-line) and SOIC-16 (Small Outline Integrated Circuit) packaging. It is a member of the Fairchild FAST series of logic devices.

The shift register is primarily used for low-speed data communication, serial-to-parallel data conversion and a variety of encoding and decoding applications.

The 74F673APC performs a serial-in/parallel-out shift register function with eight data outputs. Serial data is entered into the device under the control of a clock input (CP) which is used to synchronize the transfer of data. On each rising edge of the clock (CP) input, data is serially entered and is shifted one stage further into the register. The most significant bit is present at the Q7 output and the least significant bit is present at the Q0 output.

The S0 and S1 inputs or Mode Select inputs allow for the user to configure the device for either a Serial or Parallel transfer. In the ‘serial’ mode (when S0 and S1 = 0), data is shifted by clocking the CP input. Data obtained from the serial input (SI) is loaded in the register on the rising edge of the CP input. At the same time, data from the first stage is shifted to the next output stage.

In the ‘parallel’ mode (when S0 and S1 = 1), data is simultaneouslyloaded to the register from the parallel inputs (A0-A7). Data is clocked in by activating the CL enable input (CLE), which allows the CLK input to transfer the data from the parallel inputs to the outputs (Q0-Q7) on the next rising edge of the CLK input.

The CE (Clock Enable) allows the user to enable or disable the clock input connection to the register through the logic state placed on the CE input. When disabled (CE = 0), the CLK input is held in the present low state and hence data is shifted through the register. When enabled (CE = 1), the CLK input is enabled for shifting.

The 74F673APC device is suitable for use in cellular phones, battery appliances, and handheld applications as it draws nominal susceptibility from current leakage and is capable of functioning at very low input and output voltages.

In summary, the 74F673APC is a 8-bit serial-parallel shift register with clock enable and shift register inputs. With very low power consumption, fast speed and wide range of operating voltages, the 74F673APC is suitable for a variety of encoding and decoding applications, serial-to-parallel data conversion, and low-speed data communication.

The specific data is subject to PDF, and the above content is for reference